[Intel-gfx] [PATCH v3 3/5] drm/i915/guc: Implement dynamic WOPCM partitioning

[Yaodong Li]

On 12/08/2017 01:57 PM, Chris Wilson wrote:
> Quoting Jackie Li (2017-12-08 21:41:50)
>> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
>> index 21ce374..89ecf2c 100644
>> --- a/drivers/gpu/drm/i915/i915_gem_context.c
>> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
>> @@ -312,12 +312,16 @@ __create_hw_context(struct drm_i915_private *dev_priv,
>>          ctx->desc_template =
>>                  default_desc_template(dev_priv, dev_priv->mm.aliasing_ppgtt);
>>   
>> -       /* GuC requires the ring to be placed above GUC_WOPCM_TOP. If GuC is not
>> -        * present or not in use we still need a small bias as ring wraparound
>> -        * at offset 0 sometimes hangs. No idea why.
>> +       /* GuC requires the ring to be placed above GuC WOPCM top. Since GuC
>> +        * WOPCM won't be available until intel_uc_init_hw(), we will place
>> +        * the context above WOPCM instead if GuC WOPCM wasn't initialized.
>> +        * if GuC is not present or not in use we still need a small bias as
>> +        * ring wraparound at offset 0 sometimes hangs. No idea why.
> So preset it to the worstcase value in early guc init.
> -Chris
Thank you very much Chris! This is very helpful. Can you also help to 
review and
comment on the rest of the patch and the other patches in this serial?
Really appreciate your help! :)
>>           */
>>          if (USES_GUC(dev_priv))
>> -               ctx->ggtt_offset_bias = GUC_WOPCM_TOP;
>> +               ctx->ggtt_offset_bias = dev_priv->guc.wopcm.valid ?
>> +                       dev_priv->guc.wopcm.top : WOPCM_DEFAULT_SIZE;