[Intel-gfx] [PATCH igt v2] igt/perf_pmu: Speed up frequency measurement

[Chris Wilson]

Use the normal batch_duration_ns and display the sampled frequency:

	Frequency: min=100, max=750, boost=750 MHz
	Min frequency: requested 100.0, actual 100.0
	Max frequency: requested 755.6, actual 755.6

v2: Remove the early spin_batch_end and assert the measured frequencies
are within tolerance of our target.

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
---
 tests/gem_mocs_settings.c |  5 ++++-
 tests/perf_pmu.c          | 39 +++++++++++++++++++++++----------------
 2 files changed, 27 insertions(+), 17 deletions(-)

diff --git a/tests/gem_mocs_settings.c b/tests/gem_mocs_settings.c
index 29788b648..d9439fb07 100644
--- a/tests/gem_mocs_settings.c
+++ b/tests/gem_mocs_settings.c
@@ -336,12 +336,15 @@ static uint32_t rc6_residency(int dir)
 
 static void rc6_wait(int fd)
 {
-	int sysfs;
 	uint32_t residency;
+	int sysfs;
 
 	sysfs = igt_sysfs_open(fd, NULL);
 	igt_assert_lte(0, sysfs);
 
+	gem_quiescent_gpu(fd);
+	usleep(320e3); /* Wait for 2 EIs before polling; should now be active */
+
 	residency = rc6_residency(sysfs);
 	igt_require(igt_wait(rc6_residency(sysfs) != residency, 10000, 2));
 
diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index d88287c17..ba808f510 100644
--- a/tests/perf_pmu.c
+++ b/tests/perf_pmu.c
@@ -931,9 +931,10 @@ test_interrupts(int gem_fd)
 static void
 test_frequency(int gem_fd)
 {
-	const uint64_t duration_ns = 2e9;
 	uint32_t min_freq, max_freq, boost_freq;
-	uint64_t min[2], max[2], start[2];
+	uint64_t val[2], start[2];
+	double min[2], max[2];
+	unsigned long slept;
 	igt_spin_t *spin;
 	int fd, sysfs;
 
@@ -962,17 +963,18 @@ test_frequency(int gem_fd)
 	igt_require(igt_sysfs_set_u32(sysfs, "gt_boost_freq_mhz", min_freq));
 	igt_require(igt_sysfs_get_u32(sysfs, "gt_boost_freq_mhz") == min_freq);
 
+	gem_quiescent_gpu(gem_fd); /* Idle to be sure the change takes effect */
+	spin = igt_spin_batch_new(gem_fd, 0, I915_EXEC_RENDER, 0);
 	pmu_read_multi(fd, 2, start);
 
-	spin = igt_spin_batch_new(gem_fd, 0, I915_EXEC_RENDER, 0);
-	igt_spin_batch_set_timeout(spin, duration_ns);
-	gem_sync(gem_fd, spin->handle);
+	slept = measured_usleep(batch_duration_ns / 1000);
 
-	pmu_read_multi(fd, 2, min);
-	min[0] -= start[0];
-	min[1] -= start[1];
+	pmu_read_multi(fd, 2, val);
+	min[0] = 1e9*(val[0] - start[0]) / slept;
+	min[1] = 1e9*(val[1] - start[1]) / slept;
 
 	igt_spin_batch_free(gem_fd, spin);
+	gem_quiescent_gpu(gem_fd); /* Don't leak busy bo into the next phase */
 
 	usleep(1e6);
 
@@ -987,17 +989,18 @@ test_frequency(int gem_fd)
 	igt_require(igt_sysfs_set_u32(sysfs, "gt_min_freq_mhz", max_freq));
 	igt_require(igt_sysfs_get_u32(sysfs, "gt_min_freq_mhz") == max_freq);
 
+	gem_quiescent_gpu(gem_fd);
+	spin = igt_spin_batch_new(gem_fd, 0, I915_EXEC_RENDER, 0);
 	pmu_read_multi(fd, 2, start);
 
-	spin = igt_spin_batch_new(gem_fd, 0, I915_EXEC_RENDER, 0);
-	igt_spin_batch_set_timeout(spin, duration_ns);
-	gem_sync(gem_fd, spin->handle);
+	slept = measured_usleep(batch_duration_ns / 1000);
 
-	pmu_read_multi(fd, 2, max);
-	max[0] -= start[0];
-	max[1] -= start[1];
+	pmu_read_multi(fd, 2, val);
+	max[0] = 1e9*(val[0] - start[0]) / slept;
+	max[1] = 1e9*(val[1] - start[1]) / slept;
 
 	igt_spin_batch_free(gem_fd, spin);
+	gem_quiescent_gpu(gem_fd);
 
 	/*
 	 * Restore min/max.
@@ -1008,8 +1011,12 @@ test_frequency(int gem_fd)
 			 min_freq, igt_sysfs_get_u32(sysfs, "gt_min_freq_mhz"));
 	close(fd);
 
-	igt_assert(min[0] < max[0]);
-	igt_assert(min[1] < max[1]);
+	igt_info("Min frequency: requested %.1f, actual %.1f\n",
+		 min[0], min[1]);
+	igt_info("Max frequency: requested %.1f, actual %.1f\n",
+		 max[0], max[1]);
+	assert_within_epsilon(min[0], min_freq, tolerance);
+	assert_within_epsilon(max[1], max_freq, tolerance);
 }
 
 static bool wait_for_rc6(int fd)
-- 
2.15.1