[Intel-gfx] [PATCH 2/3] drm/i915: Show IPEIR and IPEHR in the engine dump

[Chris Wilson]

Quoting Tvrtko Ursulin (2017-12-18 11:14:19)
> 
> On 17/12/2017 13:28, Chris Wilson wrote:
> > A useful bit of information for inspecting GPU stalls from
> > intel_engine_dump() are the error registers, IPEIR and IPEHR.
> > 
> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> > Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> > ---
> >   drivers/gpu/drm/i915/intel_engine_cs.c | 7 +++++++
> >   1 file changed, 7 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> > index 510e0bc3a377..05bd9e17452c 100644
> > --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> > +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> > @@ -1757,6 +1757,13 @@ void intel_engine_dump(struct intel_engine_cs *engine,
> >       addr = intel_engine_get_last_batch_head(engine);
> >       drm_printf(m, "    BBADDR: 0x%08x_%08x\n",
> >                  upper_32_bits(addr), lower_32_bits(addr));
> > +     addr = I915_READ(RING_DMA_FADD(engine->mmio_base));
> > +     drm_printf(m, "    DMA_FADDR: 0x%08x_%08x\n",
> > +                upper_32_bits(addr), lower_32_bits(addr));
> 
> ERror capture handles this register a bit differently.
> 
> > +     drm_printf(m, "    IPEIR: 0x%08x\n",
> > +                I915_READ(RING_IPEIR(engine->mmio_base)));
> > +     drm_printf(m, "    IPEHR: 0x%08x\n",
> > +                I915_READ(RING_IPEHR(engine->mmio_base)));
> 
> This one as well two code paths depending on the gen.

My bad for assuming it was the same location, just per-engine-ified.
-Chris