[Intel-gfx] [PATCH v3] drm/i915: Show IPEIR and IPEHR in the engine dump
Tvrtko Ursulin
tvrtko.ursulin at linux.intel.com
Mon Dec 18 12:32:37 UTC 2017
On 18/12/2017 12:17, Chris Wilson wrote:
> A useful bit of information for inspecting GPU stalls from
> intel_engine_dump() are the error registers, IPEIR and IPEHR.
>
> v2: Fixup gen changes in register offsets (Tvrtko)
> v3: Old FADDR location as well
>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> ---
> drivers/gpu/drm/i915/intel_engine_cs.c | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index 510e0bc3a377..257b03a67e1c 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -1757,6 +1757,26 @@ void intel_engine_dump(struct intel_engine_cs *engine,
> addr = intel_engine_get_last_batch_head(engine);
> drm_printf(m, "\tBBADDR: 0x%08x_%08x\n",
> upper_32_bits(addr), lower_32_bits(addr));
> + if (INTEL_GEN(dev_priv) >= 4) {
> + if (INTEL_GEN(dev_priv) >= 8) {
> + addr = I915_READ(RING_DMA_FADD_UDW(engine->mmio_base));
> + addr <<= 32;
> + }
> + addr = I915_READ(RING_DMA_FADD(engine->mmio_base));
|=, or better reverse order to avoid having to init addr.
Regards,
Tvrtko
> + } else {
> + addr = I915_READ(DMA_FADD_I8XX);
> + }
> + drm_printf(m, "\tDMA_FADDR: 0x%08x_%08x\n",
> + upper_32_bits(addr), lower_32_bits(addr));
> + if (INTEL_GEN(dev_priv) >= 4) {
> + drm_printf(m, "\tIPEIR: 0x%08x\n",
> + I915_READ(RING_IPEIR(engine->mmio_base)));
> + drm_printf(m, "\tIPEHR: 0x%08x\n",
> + I915_READ(RING_IPEHR(engine->mmio_base)));
> + } else {
> + drm_printf(m, "\tIPEIR: 0x%08x\n", I915_READ(IPEIR));
> + drm_printf(m, "\tIPEHR: 0x%08x\n", I915_READ(IPEHR));
> + }
>
> if (HAS_EXECLISTS(dev_priv)) {
> const u32 *hws = &engine->status_page.page_addr[I915_HWS_CSB_BUF0_INDEX];
>
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