[Intel-gfx] [PATCH i-g-t] lib/i915_pciids.h: synchronize with kernel header

[Rodrigo Vivi]

On Wed, Dec 20, 2017 at 08:55:24PM +0000, Lucas De Marchi wrote:
> Synchronize with kernel header as of
> c99d7832dcd7 ("drm/i915/cfl: Adding more Coffee Lake PCI IDs.")
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>


> ---
>  lib/i915_pciids.h | 28 ++++++++++++++++++++++------
>  1 file changed, 22 insertions(+), 6 deletions(-)
> 
> diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
> index c65e4489..5db0458d 100644
> --- a/lib/i915_pciids.h
> +++ b/lib/i915_pciids.h
> @@ -373,29 +373,45 @@
>  /* CFL S */
>  #define INTEL_CFL_S_GT1_IDS(info) \
>  	INTEL_VGA_DEVICE(0x3E90, info), /* SRV GT1 */ \
> -	INTEL_VGA_DEVICE(0x3E93, info)  /* SRV GT1 */
> +	INTEL_VGA_DEVICE(0x3E93, info), /* SRV GT1 */ \
> +	INTEL_VGA_DEVICE(0x3E99, info)  /* SRV GT1 */
>  
>  #define INTEL_CFL_S_GT2_IDS(info) \
>  	INTEL_VGA_DEVICE(0x3E91, info), /* SRV GT2 */ \
>  	INTEL_VGA_DEVICE(0x3E92, info), /* SRV GT2 */ \
> -	INTEL_VGA_DEVICE(0x3E96, info)  /* SRV GT2 */
> +	INTEL_VGA_DEVICE(0x3E96, info), /* SRV GT2 */ \
> +	INTEL_VGA_DEVICE(0x3E9A, info)  /* SRV GT2 */
>  
>  /* CFL H */
>  #define INTEL_CFL_H_GT2_IDS(info) \
>  	INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
>  	INTEL_VGA_DEVICE(0x3E94, info)  /* Halo GT2 */
>  
> -/* CFL U */
> +/* CFL U GT1 */
> +#define INTEL_CFL_U_GT1_IDS(info) \
> +	INTEL_VGA_DEVICE(0x3EA1, info), \
> +	INTEL_VGA_DEVICE(0x3EA4, info)
> +
> +/* CFL U GT2 */
> +#define INTEL_CFL_U_GT2_IDS(info) \
> +	INTEL_VGA_DEVICE(0x3EA0, info), \
> +	INTEL_VGA_DEVICE(0x3EA3, info), \
> +	INTEL_VGA_DEVICE(0x3EA9, info)
> +
> +/* CFL U GT3 */
>  #define INTEL_CFL_U_GT3_IDS(info) \
> +	INTEL_VGA_DEVICE(0x3EA2, info), /* ULT GT3 */ \
> +	INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \
>  	INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \
>  	INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
> -	INTEL_VGA_DEVICE(0x3EA8, info), /* ULT GT3 */ \
> -	INTEL_VGA_DEVICE(0x3EA5, info)  /* ULT GT3 */
> +	INTEL_VGA_DEVICE(0x3EA8, info)  /* ULT GT3 */
>  
> -#define INTEL_CFL_IDS(info) \
> +#define INTEL_CFL_IDS(info)	   \
>  	INTEL_CFL_S_GT1_IDS(info), \
>  	INTEL_CFL_S_GT2_IDS(info), \
>  	INTEL_CFL_H_GT2_IDS(info), \
> +	INTEL_CFL_U_GT1_IDS(info), \
> +	INTEL_CFL_U_GT2_IDS(info), \
>  	INTEL_CFL_U_GT3_IDS(info)
>  
>  /* CNL U 2+2 */
> -- 
> 2.14.3
> 
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