[Intel-gfx] [PATCH 16/19] drm/i915: Remove superfluous posting reads after clear GGTT
Chris Wilson
chris at chris-wilson.co.uk
Thu Feb 2 15:02:45 UTC 2017
The barrier here is not required - we apply the barrier before the range
is ever reused by the GPU instead.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 5964b83df4e2..04636760fb38 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2166,7 +2166,6 @@ static void gen8_ggtt_clear_range(struct i915_address_space *vm,
I915_CACHE_LLC);
for (i = 0; i < num_entries; i++)
gen8_set_pte(>t_base[i], scratch_pte);
- readl(gtt_base);
}
static void gen6_ggtt_clear_range(struct i915_address_space *vm,
@@ -2191,7 +2190,6 @@ static void gen6_ggtt_clear_range(struct i915_address_space *vm,
for (i = 0; i < num_entries; i++)
iowrite32(scratch_pte, >t_base[i]);
- readl(gtt_base);
}
static void i915_ggtt_insert_page(struct i915_address_space *vm,
@@ -2215,7 +2213,6 @@ static void i915_ggtt_insert_entries(struct i915_address_space *vm,
AGP_USER_MEMORY : AGP_USER_CACHED_MEMORY;
intel_gtt_insert_sg_entries(pages, start >> PAGE_SHIFT, flags);
-
}
static void i915_ggtt_clear_range(struct i915_address_space *vm,
--
2.11.0
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