[Intel-gfx] [PATCH 1/2] drm/i915: Tidy the tail of i915_tiling_ok()

[Chris Wilson]

The current tail breaks the pattern of if (check) return false, which
can catch the reader out. If we move the gen2/3 power-of-two test into
the earlier gen2/3 branch, we can eliminate the contrary tail.

Suggested-by: Tvrtko Ursulin <tvrtko.ursulin at linux.intel.com>
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin at linux.intel.com>
---
 drivers/gpu/drm/i915/i915_gem_tiling.c | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index a80f362d2ac1..62148396c796 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -158,6 +158,9 @@ i915_tiling_ok(struct drm_i915_gem_object *obj,
 		if (stride > 8192)
 			return false;
 
+		 if (!is_power_of_2(stride))
+			 return false;
+
 		if (IS_GEN3(i915)) {
 			if (obj->base.size > I830_FENCE_MAX_SIZE_VAL << 20)
 				return false;
@@ -176,12 +179,7 @@ i915_tiling_ok(struct drm_i915_gem_object *obj,
 	if (!stride || !IS_ALIGNED(stride, tile_width))
 		return false;
 
-	/* 965+ just needs multiples of tile width */
-	if (INTEL_GEN(i915) >= 4)
-		return true;
-
-	/* Pre-965 needs power of two tile widths */
-	return is_power_of_2(stride);
+	return true;
 }
 
 static bool i915_vma_fence_prepare(struct i915_vma *vma,
-- 
2.11.0