[Intel-gfx] [PATCH 2/3] drm/i915: Split GEM resetting into 3 phases

[Chris Wilson]

On Tue, Feb 07, 2017 at 09:12:25PM +0000, Chris Wilson wrote:
> Currently we do a reset prepare/finish around the call to reset the GPU,
> but it looks like we need a later stage after the hw has been
> reinitialised to allow GEM to restart itself. Start by splitting the 2
> GEM phases into 3:
> 
>   prepare - before the reset, check if GEM recovered, then stop GEM
> 
>   reset - after the reset, update GEM bookkeeping
> 
>   finish - after the re-initialisation following the reset, restart GEM
> 
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.c |  3 ++-
>  drivers/gpu/drm/i915/i915_drv.h |  1 +
>  drivers/gpu/drm/i915/i915_gem.c | 11 ++++++++---
>  3 files changed, 11 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index acbd772837b5..0aa4ac2b43ca 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1836,7 +1836,7 @@ void i915_reset(struct drm_i915_private *dev_priv)
>  		goto error;
>  	}
>  
> -	i915_gem_reset_finish(dev_priv);
> +	i915_gem_reset(dev_priv);
>  	intel_overlay_reset(dev_priv);
>  
>  	/* Ok, now get things going again... */
> @@ -1859,6 +1859,7 @@ void i915_reset(struct drm_i915_private *dev_priv)
>  		goto error;
>  	}
>  
> +	i915_gem_reset_finish(dev_priv);
>  	i915_queue_hangcheck(dev_priv);
>  
>  wakeup:
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 0cbd289da4ba..972d35259883 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -3353,6 +3353,7 @@ static inline u32 i915_reset_count(struct i915_gpu_error *error)
>  }
>  
>  int i915_gem_reset_prepare(struct drm_i915_private *dev_priv);
> +void i915_gem_reset(struct drm_i915_private *dev_priv);
>  void i915_gem_reset_finish(struct drm_i915_private *dev_priv);
>  void i915_gem_set_wedged(struct drm_i915_private *dev_priv);
>  void i915_gem_clflush_object(struct drm_i915_gem_object *obj, bool force);
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 17bcec9f1321..e125c0d61ce9 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2760,7 +2760,7 @@ static void i915_gem_reset_engine(struct intel_engine_cs *engine)
>  		engine_skip_context(request);
>  }
>  
> -void i915_gem_reset_finish(struct drm_i915_private *dev_priv)
> +void i915_gem_reset(struct drm_i915_private *dev_priv)
>  {
>  	struct intel_engine_cs *engine;
>  	enum intel_engine_id id;
> @@ -2772,8 +2772,6 @@ void i915_gem_reset_finish(struct drm_i915_private *dev_priv)
>  	for_each_engine(engine, dev_priv, id)
>  		i915_gem_reset_engine(engine);
>  
> -	i915_gem_restore_fences(dev_priv);

Restore fences has to be before the init_hw() for gen2/3 - otherwise we
may restart requests trying to access through the fences.

Imagine this patch just introduced the empty function and renamed the
pair.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre