[Intel-gfx] [GLK MIPI DSI V5 0/8] GLK MIPI DSI VIDEO MODE PATCHES

[Madhav Chauhan]

The patches in this list enable MIPI DSI video mode
support for GLK platform. Tesed locally.
v2: Renamed bitfields macros as per review comments(Jani)
v3: Code alignment/abstraction as per arch (Jani review comments)
v4: Fix MIPI DSI disable sequence. Review comments(Jani)
v5: Review comments addressed for restructuring code (Jani & Ander)

Deepak M (7):
  drm/i915/glk: Program dphy param reg for GLK
  drm/i915/glk: Program new MIPI DSI PHY registers for GLK
  drm/i915/glk: Add MIPIIO Enable/disable sequence
  drm/i915: Set the Z inversion overlap field
  drm/i915/glk: Add DSI PLL divider range for glk
  drm/i915i/glk: Program MIPI_CLOCK_CTRL only for BXT
  drm/i915/glk: Program txesc clock divider for GLK

Madhav Chauhan (1):
  drm/i915/glk: Validate only DSI PORT A PLL divider

 drivers/gpu/drm/i915/i915_reg.h            |  17 +++
 drivers/gpu/drm/i915/intel_dsi.c           | 231 +++++++++++++++++++++++++++--
 drivers/gpu/drm/i915/intel_dsi_panel_vbt.c |  31 ++--
 drivers/gpu/drm/i915/intel_dsi_pll.c       | 129 ++++++++++++----
 4 files changed, 353 insertions(+), 55 deletions(-)

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1.9.1