[Intel-gfx] [PATCH v3 21/23] drm/i915: Only preallocate the aliasing GTT to the extents of the global GTT
Mika Kuoppala
mika.kuoppala at linux.intel.com
Tue Feb 14 16:16:12 UTC 2017
Chris Wilson <chris at chris-wilson.co.uk> writes:
> As the aliasing GTT is only accessed via the global GTT, we will never
> use more of it than we expose via the Global GTT and so we only need to
> preallocate sufficient space within the ppgtt for the full GTT. Equally,
> if the aliasing GTT is smaller than the global GTT, we have a serious
> issue and must bail.
>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 2dec388988bd..379bf6fbbc64 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -2383,9 +2383,14 @@ int i915_gem_init_aliasing_ppgtt(struct drm_i915_private *i915)
> if (IS_ERR(ppgtt))
> return PTR_ERR(ppgtt);
>
> + if (WARN_ON(ppgtt->base.total < ggtt->base.total)) {
> + err = -ENODEV;
> + goto err_ppgtt;
> + }
> +
> if (ppgtt->base.allocate_va_range) {
> err = ppgtt->base.allocate_va_range(&ppgtt->base,
> - 0, ppgtt->base.total);
> + 0, ggtt->base.total);
Comment could be worthy in here so emphasis the intent to limit.
Reviewed-by: Mika Kuoppala <mika.kuoppala at intel.com>
> if (err)
> goto err_ppgtt;
> }
> --
> 2.11.0
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