[Intel-gfx] [PATCH v3 03/23] drm/i915: Micro-optimise gen8_ppgtt_insert_entries()

[Chris Wilson]

On Tue, Feb 14, 2017 at 06:00:55PM +0200, Mika Kuoppala wrote:
> Chris Wilson <chris at chris-wilson.co.uk> writes:
> > -	while (__sg_page_iter_next(sg_iter)) {
> > -		if (pt_vaddr == NULL) {
> > -			struct i915_page_directory *pd = pdp->page_directory[pdpe];
> > -			struct i915_page_table *pt = pd->page_table[pde];
> > -			pt_vaddr = kmap_px(pt);
> > +			iter->dma = sg_dma_address(iter->sg);
> > +			iter->max = iter->dma + iter->sg->length;
> >  		}
> >  
> > -		pt_vaddr[pte] =
> > -			gen8_pte_encode(sg_page_iter_dma_address(sg_iter),
> > -					cache_level);
> >  		if (++pte == GEN8_PTES) {
> > -			kunmap_px(ppgtt, pt_vaddr);
> > -			pt_vaddr = NULL;
> >  			if (++pde == I915_PDES) {
> > -				if (++pdpe == I915_PDPES_PER_PDP(vm->i915))
> > +				if (++pdpe == GEN8_PML4ES_PER_PML4) {
> 
> For the next reader, you could add a comment that we run out of
> scatterlists elements on 32bit ppgtt (pages->sgl) before reaching here.

And added a GEM_BUG_ON(pdpe > GEN8_LEGACY_PDPES); before the deref.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre