[Intel-gfx] [PATCH] drm/i915: Break i915_spin_request() if we see an interrupt
Tvrtko Ursulin
tvrtko.ursulin at linux.intel.com
Thu Feb 16 13:26:58 UTC 2017
On 16/02/2017 13:17, Mika Kuoppala wrote:
> Chris Wilson <chris at chris-wilson.co.uk> writes:
>
>> If an interrupt has been posted, and we were spinning on the active
>> seqno waiting for it to advance but it did not, then we can expect that
>> it will not see its advance in the immediate future
>
> Why we can expect this?
Maybe it should be "if (engine->irq_seqno_barrier && test_bit(...))" if
my thinking is right that this expectation applies on platforms with
slow barriers?
Regards,
Tvrtko
>
>> and should call into
>> the irq-seqno barrier. We can stop spinning at this point, and leave the
>> difficulty of handling the coherency to the caller.
>>
>> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
>> Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
>> ---
>> drivers/gpu/drm/i915/i915_gem_request.c | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_gem_request.c b/drivers/gpu/drm/i915/i915_gem_request.c
>> index 7760d7481f85..9e42b2687cae 100644
>> --- a/drivers/gpu/drm/i915/i915_gem_request.c
>> +++ b/drivers/gpu/drm/i915/i915_gem_request.c
>> @@ -993,6 +993,9 @@ bool __i915_spin_request(const struct drm_i915_gem_request *req,
>> seqno))
>> return true;
>>
>> + if (test_bit(ENGINE_IRQ_BREADCRUMB, &req->engine->irq_posted))
>> + break;
>> +
>> if (signal_pending_state(state, current))
>> break;
>>
>> --
>> 2.11.0
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx at lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
More information about the Intel-gfx
mailing list