[Intel-gfx] [PATCH 3/3] drm/i915: Merge BDW pipe gamma and degamma table code

[Ander Conselvan de Oliveira]

The only difference between the code loading the pipe gamma and degamma
tables in BDW is that the gamma code also writes the registers that hold
the maximum values. So we can use the gamma code for the degamma table,
at the expense of writing the maximum value register twice, with
potenttially wrong values in the first time.

v2: Pass PAL_PREC_SPLIT_MODE from the caller. (Ville)
v3: Pass intel_crtc to bdw_load_lut(). (Ville)
    Remove cast in function parameter list. (Ville)
Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira at intel.com>
---
 drivers/gpu/drm/i915/intel_color.c | 74 ++++++++++++++------------------------
 1 file changed, 27 insertions(+), 47 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
index b9e5266d..9cb1c14 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -340,54 +340,29 @@ static void haswell_load_luts(struct drm_crtc_state *crtc_state)
 		hsw_enable_ips(intel_crtc);
 }
 
-static void bdw_load_degamma_lut(struct drm_crtc_state *state)
+static struct drm_color_lut *
+blob_data_as_lut(struct drm_property_blob *blob)
 {
-	struct drm_i915_private *dev_priv = to_i915(state->crtc->dev);
-	enum pipe pipe = to_intel_crtc(state->crtc)->pipe;
-	uint32_t i, lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
-
-	I915_WRITE(PREC_PAL_INDEX(pipe),
-		   PAL_PREC_SPLIT_MODE | PAL_PREC_AUTO_INCREMENT);
-
-	if (state->degamma_lut) {
-		struct drm_color_lut *lut =
-			(struct drm_color_lut *) state->degamma_lut->data;
-
-		for (i = 0; i < lut_size; i++) {
-			uint32_t word =
-			drm_color_lut_extract(lut[i].red, 10) << 20 |
-			drm_color_lut_extract(lut[i].green, 10) << 10 |
-			drm_color_lut_extract(lut[i].blue, 10);
-
-			I915_WRITE(PREC_PAL_DATA(pipe), word);
-		}
-	} else {
-		for (i = 0; i < lut_size; i++) {
-			uint32_t v = (i * ((1 << 10) - 1)) / (lut_size - 1);
+	if (!blob)
+		return NULL;
 
-			I915_WRITE(PREC_PAL_DATA(pipe),
-				   (v << 20) | (v << 10) | v);
-		}
-	}
+	return (struct drm_color_lut *) blob->data;
 }
 
-static void bdw_load_gamma_lut(struct drm_crtc_state *state, u32 offset)
+static void bdw_load_lut(struct intel_crtc *crtc, u32 offset,
+			 struct drm_color_lut *lut, u32 lut_size,
+			 u32 flags)
 {
-	struct drm_i915_private *dev_priv = to_i915(state->crtc->dev);
-	enum pipe pipe = to_intel_crtc(state->crtc)->pipe;
-	uint32_t i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
+	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+	enum pipe pipe = crtc->pipe;
+	uint32_t i;
 
 	WARN_ON(offset & ~PAL_PREC_INDEX_VALUE_MASK);
 
 	I915_WRITE(PREC_PAL_INDEX(pipe),
-		   (offset ? PAL_PREC_SPLIT_MODE : 0) |
-		   PAL_PREC_AUTO_INCREMENT |
-		   offset);
-
-	if (state->gamma_lut) {
-		struct drm_color_lut *lut =
-			(struct drm_color_lut *) state->gamma_lut->data;
+		   flags | PAL_PREC_AUTO_INCREMENT | offset);
 
+	if (lut) {
 		for (i = 0; i < lut_size; i++) {
 			uint32_t word =
 			(drm_color_lut_extract(lut[i].red, 10) << 20) |
@@ -423,16 +398,21 @@ static void broadwell_load_luts(struct drm_crtc_state *state)
 {
 	struct drm_i915_private *dev_priv = to_i915(state->crtc->dev);
 	struct intel_crtc_state *intel_state = to_intel_crtc_state(state);
-	enum pipe pipe = to_intel_crtc(state->crtc)->pipe;
+	struct intel_crtc *crtc = to_intel_crtc(state->crtc);
+	enum pipe pipe = crtc->pipe;
 
 	if (crtc_state_is_legacy(state)) {
 		haswell_load_luts(state);
 		return;
 	}
 
-	bdw_load_degamma_lut(state);
-	bdw_load_gamma_lut(state,
-			   INTEL_INFO(dev_priv)->color.degamma_lut_size);
+	bdw_load_lut(crtc, 0, blob_data_as_lut(state->degamma_lut),
+		     INTEL_INFO(dev_priv)->color.degamma_lut_size,
+		     PAL_PREC_SPLIT_MODE);
+	bdw_load_lut(crtc, INTEL_INFO(dev_priv)->color.degamma_lut_size,
+		     blob_data_as_lut(state->gamma_lut),
+		     INTEL_INFO(dev_priv)->color.gamma_lut_size,
+		     PAL_PREC_SPLIT_MODE);
 
 	intel_state->gamma_mode = GAMMA_MODE_MODE_SPLIT;
 	I915_WRITE(GAMMA_MODE(pipe), GAMMA_MODE_MODE_SPLIT);
@@ -477,11 +457,10 @@ static void glk_load_degamma_lut(struct drm_crtc_state *state)
 
 static void glk_load_luts(struct drm_crtc_state *state)
 {
-	struct drm_crtc *crtc = state->crtc;
-	struct drm_device *dev = crtc->dev;
-	struct drm_i915_private *dev_priv = to_i915(dev);
+	struct drm_i915_private *dev_priv = to_i915(state->crtc->dev);
 	struct intel_crtc_state *intel_state = to_intel_crtc_state(state);
-	enum pipe pipe = to_intel_crtc(crtc)->pipe;
+	struct intel_crtc *crtc = to_intel_crtc(state->crtc);
+	enum pipe pipe = crtc->pipe;
 
 	glk_load_degamma_lut(state);
 
@@ -490,7 +469,8 @@ static void glk_load_luts(struct drm_crtc_state *state)
 		return;
 	}
 
-	bdw_load_gamma_lut(state, 0);
+	bdw_load_lut(crtc, 0, blob_data_as_lut(state->gamma_lut),
+		     INTEL_INFO(dev_priv)->color.gamma_lut_size, 0);
 
 	intel_state->gamma_mode = GAMMA_MODE_MODE_10BIT;
 	I915_WRITE(GAMMA_MODE(pipe), GAMMA_MODE_MODE_10BIT);
-- 
2.9.3