[Intel-gfx] [PATCH 6/7] drm/i915: Restart RPS using the same RP_CONTROL as from initialisation

[Chris Wilson]

On Mon, Feb 20, 2017 at 04:40:47PM +0200, Mika Kuoppala wrote:
> Chris Wilson <chris at chris-wilson.co.uk> writes:
> 
> > During initialisation, we set different flags for different
> > architectures - these should be preserved when we reload the RPS
> > thresholds. If we use a mmio read, it will first ensure that the
> > threshold registers are written before we apply the latch in RP_CONTROL.
> >
> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> > Cc: stable at vger.kernel.org
> 
> This will change how the valleyview will do the DOWN_IDLE,
> due to readback you will get a GEN6_RP_DOWN_IDLE_CONT.

No change, since we don't use it on byt - we only use the EI intervals
as we manually calculate the up/down signals based on the C0 counters.
 
> I can't think of why we would like to keep that behaviour
> as the IDLE_CONT setup is a twart in my opinion.
> 
> If you agree with the above, substitute the IDLE_CONT in
> valleview setup and you can add,

It is a mistake in the setup, but that change has to be seperate to
exclude it as being part of the magic that avoids the hang.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre