[Intel-gfx] [PATCH 0/6] Enable OA unit for Gen 8 and 9 in i915 perf
Robert Bragg
robert at sixbynine.org
Wed Feb 22 16:36:28 UTC 2017
This extends i915 perf to support periodic sampling of OA metrics for BDW, CHV,
SKL and BXT.
I've recently been working through a number of issues that were uncovered once
I started adapting the gen7 IGT tests. Some further issues were also noticed by
others using INTEL_performance_query in Mesa. So compared to earlier Gen8+ OA
series sent out a few notable updates are:
* Implements tail race handling like we have for gen 7
* On SKL we disable automatic reports for slice/unslice clock ratio changes
because the hardware can generate so many redundant reports (no ratio change)
that buffer overflows can start to become a problem and userspace ends up
doing an unreasonable amount of work to keep up.
* WaDisableDopClockGating:bdw is no longer handled in i915_perf.c
* Flex EU register updates within the register state context were using
incorrect offsets before.
* The generated per-gen config initialization code wasn't initializing the
flex eu register state.
* While filtering for a single context we weren't forwarding userspace the
reports it needed to bookend around context switches so that it can discount
the progress of the counters associated with other contexts.
* Even opening a stream for single context filtered OA metrics requires
dev.i915.perf_stream_paranoid == 0 since we can no longer reliably hide the
progress of system-wide metrics, now that filtering is done based on tagging
reports with an ID instead of physically clock gating the OA unit off for
other contests.
In case anyone wants to take a look at the IGT tests so far they can be found
here:
https://github.com/rib/intel-gpu-tools/commits/wip/rib/i915-perf-tests
I should probably write a few additional tests specific to changes made for
gen8+, but I've at least adapted the existing tests for gen7.
I can only say I've tested on Skylake recently, so although we can hopefully
review these patches with an eye towards upstreaming, they do still need some
broader testing across more hardware.
Considering the large number of configs for Gen 8 and 9, and how unsure I am
about the maturity of all the various configs I do have some doubt about
whether we should upstream them all together if someone hasn't looked at the
unique counters for each set against a relevant workload to see that the
numbers look plausible (so ignoring the common A counters). On the other hand
being optimistic means we can make more sets available faster and even makes it
more likely they will be tested across a broader range of workloads. We can
add replacement configs if needs be or even stop advertising configs
considering how they are advertised to userspace dynamically.
Note: these patches are based on the patches I sent out to update the tail
pointer race workaround for Haswell in i915 perf.
Regards,
- Robert
Robert Bragg (6):
drm/i915: expose _SLICE_MASK GETPARM
drm/i915: expose _SUBSLICE_MASK GETPARM
drm/i915: Add uncore mmio api for per-context registers
drm/i915: Add 'render basic' Gen8+ OA unit configs
drm/i915: Add OA unit support for Gen 8+
drm/i915: Add more OA configs for BDW, CHV, SKL + BXT
drivers/gpu/drm/i915/Makefile | 8 +-
drivers/gpu/drm/i915/i915_drv.c | 10 +
drivers/gpu/drm/i915/i915_drv.h | 20 +
drivers/gpu/drm/i915/i915_gem_context.h | 1 +
drivers/gpu/drm/i915/i915_oa_bdw.c | 4954 +++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/i915_oa_bdw.h | 38 +
drivers/gpu/drm/i915/i915_oa_bxt.c | 2541 ++++++++++++++++
drivers/gpu/drm/i915/i915_oa_bxt.h | 38 +
drivers/gpu/drm/i915/i915_oa_chv.c | 2730 +++++++++++++++++
drivers/gpu/drm/i915/i915_oa_chv.h | 38 +
drivers/gpu/drm/i915/i915_oa_sklgt2.c | 3303 +++++++++++++++++++++
drivers/gpu/drm/i915/i915_oa_sklgt2.h | 38 +
drivers/gpu/drm/i915/i915_oa_sklgt3.c | 2856 ++++++++++++++++++
drivers/gpu/drm/i915/i915_oa_sklgt3.h | 38 +
drivers/gpu/drm/i915/i915_oa_sklgt4.c | 2910 ++++++++++++++++++
drivers/gpu/drm/i915/i915_oa_sklgt4.h | 38 +
drivers/gpu/drm/i915/i915_perf.c | 1067 ++++++-
drivers/gpu/drm/i915/i915_reg.h | 12 +
drivers/gpu/drm/i915/intel_lrc.c | 4 +
drivers/gpu/drm/i915/intel_uncore.c | 73 +
include/uapi/drm/i915_drm.h | 21 +-
21 files changed, 20667 insertions(+), 71 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_oa_bdw.c
create mode 100644 drivers/gpu/drm/i915/i915_oa_bdw.h
create mode 100644 drivers/gpu/drm/i915/i915_oa_bxt.c
create mode 100644 drivers/gpu/drm/i915/i915_oa_bxt.h
create mode 100644 drivers/gpu/drm/i915/i915_oa_chv.c
create mode 100644 drivers/gpu/drm/i915/i915_oa_chv.h
create mode 100644 drivers/gpu/drm/i915/i915_oa_sklgt2.c
create mode 100644 drivers/gpu/drm/i915/i915_oa_sklgt2.h
create mode 100644 drivers/gpu/drm/i915/i915_oa_sklgt3.c
create mode 100644 drivers/gpu/drm/i915/i915_oa_sklgt3.h
create mode 100644 drivers/gpu/drm/i915/i915_oa_sklgt4.c
create mode 100644 drivers/gpu/drm/i915/i915_oa_sklgt4.h
--
2.11.1
More information about the Intel-gfx
mailing list