[Intel-gfx] [PATCH 4/5] drm/i915/gtt: No need to do tlb flush with 48bit vm

[Mika Kuoppala]

The pdp rewrite to force tlb flush is only a 32bit ppgtt
trick. That should not be needed with 48bit ppgtt.

Cc: Chris Wilson <chris at chris-wilson.co.uk>
Signed-off-by: Mika Kuoppala <mika.kuoppala at intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 269a8f1..791cb81 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1103,7 +1103,8 @@ static int gen8_ppgtt_alloc_pdp(struct i915_address_space *vm,
 			gen8_ppgtt_set_pdpe(vm, pdp, pd, pdpe);
 			pdp->used_pdpes++;
 
-			mark_tlbs_dirty(i915_vm_to_ppgtt(vm));
+			if (!i915_vm_is_48bit(vm))
+				mark_tlbs_dirty(i915_vm_to_ppgtt(vm));
 		}
 
 		ret = gen8_ppgtt_alloc_pd(vm, pd, start, length);
-- 
2.7.4