[Intel-gfx] [PATCH resend 04/15] drm/i915/dsi: Move intel_dsi_clear_device_ready()

[Bob Paauwe]

On Mon, 20 Feb 2017 15:08:34 +0100
Hans de Goede <hdegoede at redhat.com> wrote:

> Move the intel_dsi_clear_device_ready() function to higher up in
> intel_dsi.c this pairs it with intel_dsi_device_ready(); and pairs
> intel_dsi_*enable* with intel_dsi_*disable without
> intel_dsi_clear_device_ready() sitting in the middle of them.
> 
> This commit purely moves code around, it does not make any
> changes what-so-ever.
> 
> Signed-off-by: Hans de Goede <hdegoede at redhat.com>
> Acked-by: Jani Nikula <jani.nikula at intel.com>

Reviewed-by: Bob Paauwe <bob.j.paauwe at intel.com>

> ---
>  drivers/gpu/drm/i915/intel_dsi.c | 86 ++++++++++++++++++++--------------------
>  1 file changed, 43 insertions(+), 43 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> index d741280..072f99b 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -433,6 +433,49 @@ static void intel_dsi_device_ready(struct intel_encoder *encoder)
>  		bxt_dsi_device_ready(encoder);
>  }
>  
> +static void intel_dsi_clear_device_ready(struct intel_encoder *encoder)
> +{
> +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
> +	enum port port;
> +
> +	DRM_DEBUG_KMS("\n");
> +	for_each_dsi_port(port, intel_dsi->ports) {
> +		/* Common bit for both MIPI Port A & MIPI Port C on VLV/CHV */
> +		i915_reg_t port_ctrl = IS_GEN9_LP(dev_priv) ?
> +			BXT_MIPI_PORT_CTRL(port) : MIPI_PORT_CTRL(PORT_A);
> +		u32 val;
> +
> +		I915_WRITE(MIPI_DEVICE_READY(port), DEVICE_READY |
> +							ULPS_STATE_ENTER);
> +		usleep_range(2000, 2500);
> +
> +		I915_WRITE(MIPI_DEVICE_READY(port), DEVICE_READY |
> +							ULPS_STATE_EXIT);
> +		usleep_range(2000, 2500);
> +
> +		I915_WRITE(MIPI_DEVICE_READY(port), DEVICE_READY |
> +							ULPS_STATE_ENTER);
> +		usleep_range(2000, 2500);
> +
> +		/* Wait till Clock lanes are in LP-00 state for MIPI Port A
> +		 * only. MIPI Port C has no similar bit for checking
> +		 */
> +		if (intel_wait_for_register(dev_priv,
> +					    port_ctrl, AFE_LATCHOUT, 0,
> +					    30))
> +			DRM_ERROR("DSI LP not going Low\n");
> +
> +		/* Disable MIPI PHY transparent latch */
> +		val = I915_READ(port_ctrl);
> +		I915_WRITE(port_ctrl, val & ~LP_OUTPUT_HOLD);
> +		usleep_range(1000, 1500);
> +
> +		I915_WRITE(MIPI_DEVICE_READY(port), 0x00);
> +		usleep_range(2000, 2500);
> +	}
> +}
> +
>  static void intel_dsi_port_enable(struct intel_encoder *encoder)
>  {
>  	struct drm_device *dev = encoder->base.dev;
> @@ -621,49 +664,6 @@ static void intel_dsi_pre_disable(struct intel_encoder *encoder,
>  	}
>  }
>  
> -static void intel_dsi_clear_device_ready(struct intel_encoder *encoder)
> -{
> -	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> -	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
> -	enum port port;
> -
> -	DRM_DEBUG_KMS("\n");
> -	for_each_dsi_port(port, intel_dsi->ports) {
> -		/* Common bit for both MIPI Port A & MIPI Port C on VLV/CHV */
> -		i915_reg_t port_ctrl = IS_GEN9_LP(dev_priv) ?
> -			BXT_MIPI_PORT_CTRL(port) : MIPI_PORT_CTRL(PORT_A);
> -		u32 val;
> -
> -		I915_WRITE(MIPI_DEVICE_READY(port), DEVICE_READY |
> -							ULPS_STATE_ENTER);
> -		usleep_range(2000, 2500);
> -
> -		I915_WRITE(MIPI_DEVICE_READY(port), DEVICE_READY |
> -							ULPS_STATE_EXIT);
> -		usleep_range(2000, 2500);
> -
> -		I915_WRITE(MIPI_DEVICE_READY(port), DEVICE_READY |
> -							ULPS_STATE_ENTER);
> -		usleep_range(2000, 2500);
> -
> -		/* Wait till Clock lanes are in LP-00 state for MIPI Port A
> -		 * only. MIPI Port C has no similar bit for checking
> -		 */
> -		if (intel_wait_for_register(dev_priv,
> -					    port_ctrl, AFE_LATCHOUT, 0,
> -					    30))
> -			DRM_ERROR("DSI LP not going Low\n");
> -
> -		/* Disable MIPI PHY transparent latch */
> -		val = I915_READ(port_ctrl);
> -		I915_WRITE(port_ctrl, val & ~LP_OUTPUT_HOLD);
> -		usleep_range(1000, 1500);
> -
> -		I915_WRITE(MIPI_DEVICE_READY(port), 0x00);
> -		usleep_range(2000, 2500);
> -	}
> -}
> -
>  static void intel_dsi_post_disable(struct intel_encoder *encoder,
>  				   struct intel_crtc_state *pipe_config,
>  				   struct drm_connector_state *conn_state)



-- 
--
Bob Paauwe                  
Bob.J.Paauwe at intel.com
IOTG / PED Software Organization
Intel Corp.  Folsom, CA
(916) 356-6193