[Intel-gfx] [PATCH] drm/i915: Advance start address on crossing PML (48b ppgtt) boundary

[Matthew Auld]

On 24 February 2017 at 22:37, Chris Wilson <chris at chris-wilson.co.uk> wrote:
> When advancing onto the next 4th level page table entry, we need to
> reset our indices to 0. Currently we restart from the original address
> which means we start with an offset into the next PML table.
>
> Fixes: 894ccebee2b0 ("drm/i915: Micro-optimise gen8_ppgtt_insert_entries()")
> Reported-by: Matthew Auld <matthew.william.auld at gmail.com>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99948
> Testcase: igt/drv_selftest/live_gtt
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Matthew Auld <matthew.william.auld at gmail.com>
Tested-by: Matthew Auld <matthew.william.auld at gmail.com>
Reviewed-by: Matthew Auld <matthew.william.auld at gmail.com>