[Intel-gfx] [PATCH v5 3/3] drm/i915/guc: Reorder __i915_guc_submit to reduce spinlock holdtime

[Tvrtko Ursulin]

On 28/02/2017 11:28, Chris Wilson wrote:
> A couple of operations, the flushes and the tracepoint, do not require
> serialisation by client->wq_lock, so move them before we take it.
>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_guc_submission.c | 13 +++++++------
>  1 file changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
> index d6a6cf2540a1..7b535a32fc27 100644
> --- a/drivers/gpu/drm/i915/i915_guc_submission.c
> +++ b/drivers/gpu/drm/i915/i915_guc_submission.c
> @@ -517,18 +517,18 @@ static void __i915_guc_submit(struct drm_i915_gem_request *rq)
>  	struct i915_guc_client *client = guc->execbuf_client;
>  	int b_ret;
>
> -	/* We are always called with irqs disabled */
> -	GEM_BUG_ON(!irqs_disabled());
> -
> -	spin_lock(&client->wq_lock);
> -	guc_wq_item_append(client, rq);
> -
>  	/* WA to flush out the pending GMADR writes to ring buffer. */
>  	if (i915_vma_is_map_and_fenceable(rq->ring->vma))
>  		POSTING_READ_FW(GUC_STATUS);
>
>  	trace_i915_gem_request_in(rq, 0);
>
> +	/* We are always called with irqs disabled */
> +	GEM_BUG_ON(!irqs_disabled());
> +
> +	spin_lock(&client->wq_lock);
> +
> +	guc_wq_item_append(client, rq);
>  	b_ret = guc_ring_doorbell(client);
>
>  	client->submissions[engine_id] += 1;
> @@ -538,6 +538,7 @@ static void __i915_guc_submit(struct drm_i915_gem_request *rq)
>
>  	guc->submissions[engine_id] += 1;
>  	guc->last_seqno[engine_id] = rq->global_seqno;
> +
>  	spin_unlock(&client->wq_lock);
>  }
>
>

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>

Regards,

Tvrtko