[Intel-gfx] [PATCH] drm/i915: Use BUILD_BUG_ON to detected missing engine definitions

[Michal Wajdeczko]

On Tue, Feb 28, 2017 at 03:08:19PM +0000, Chris Wilson wrote:
> On Tue, Feb 28, 2017 at 03:52:31PM +0100, Michal Wajdeczko wrote:
> > On Tue, Feb 28, 2017 at 02:21:23PM +0000, Tvrtko Ursulin wrote:
> > > 
> > > On 28/02/2017 14:00, Michal Wajdeczko wrote:
> > > > Additionally use runtime check to catch invalid engine indices.
> > > > 
> > > > Signed-off-by: Michal Wajdeczko <michal.wajdeczko at intel.com>
> > > > Cc: Jani Nikula <jani.nikula at intel.com>
> > > > ---
> > > >  drivers/gpu/drm/i915/intel_engine_cs.c | 2 ++
> > > >  1 file changed, 2 insertions(+)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> > > > index a238304..8df53ae 100644
> > > > --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> > > > +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> > > > @@ -89,6 +89,8 @@ intel_engine_setup(struct drm_i915_private *dev_priv,
> > > >  	const struct engine_info *info = &intel_engines[id];
> > > >  	struct intel_engine_cs *engine;
> > > > 
> > > > +	BUILD_BUG_ON(ARRAY_SIZE(intel_engines) != I915_NUM_ENGINES);
> > > 
> > > For some reason I feel this is too strict. ;)
> > 
> > It has to be strict to be useful. 
> 
> But is pointless if it doesn't apply to gen+1, or tomorrow's packing of
> sparse engines, which is where Tvrtko is coming from.

But it applies.

It shall still work as each ring bit used by HAS_ENGINE() will likely
still represent single entry in dev_priv->engine[].

As design assumes strong relation between intel_engines[] and dev_priv->engine[]
arrays, we should have some way to validate correctness of that assumption.

Note that this check should help us catch any mistakes that Tvrtko introduces ;)

Unless, there will be full redesign.

-Michal


ps. I'm coming from almost the same place as Tvrtko ;)