[Intel-gfx] [PATCH i-g-t 2/2] tests/gem_bad_address: Fix store address

[Antonio Argenziano]

The test purpose is to write at an invalid GTT location. To do so, the
store instruction used in the test has been updated to use the correct
value and extra unneeded flags have been removed. The batch buffer is
also sent as privileged now.

Signed-off-by: Antonio Argenziano <antonio.argenziano at intel.com>
---
 tests/gem_bad_address.c | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/tests/gem_bad_address.c b/tests/gem_bad_address.c
index a970dfa4..720ab24d 100644
--- a/tests/gem_bad_address.c
+++ b/tests/gem_bad_address.c
@@ -38,22 +38,26 @@
 #include "drm.h"
 #include "intel_bufmgr.h"
 
+/*
+    The intent of this test is to try write an area of memory that is outside
+    the currently allowed boundary of the GTT. To do so it will use a batch
+    buffer that will run on Blitter engine as a privileged batch.
+*/
+
 static drm_intel_bufmgr *bufmgr;
 struct intel_batchbuffer *batch;
 
-#define BAD_GTT_DEST ((512*1024*1024)) /* past end of aperture */
-
 static void
 bad_store(void)
 {
 	BEGIN_BATCH(4, 0);
-	OUT_BATCH(MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL | 1 << 21);
-	OUT_BATCH(0);
-	OUT_BATCH(BAD_GTT_DEST);
+	OUT_BATCH(MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL );
+	OUT_BATCH(0); // lower part of the address (first 4 GByte = GTT size)
+	OUT_BATCH(0x1); //Higher part of the address (>GTT size)
 	OUT_BATCH(0xdeadbeef);
 	ADVANCE_BATCH();
 
-	intel_batchbuffer_flush(batch);
+	intel_batchbuffer_flush_secure(batch);
 }
 
 igt_simple_main
-- 
2.11.0