[Intel-gfx] [PATCH] drm/i915: Initialize num_scalers for skl and glk too
Ville Syrjälä
ville.syrjala at linux.intel.com
Tue Jan 3 13:35:00 UTC 2017
On Mon, Jan 02, 2017 at 03:54:41PM +0200, Ander Conselvan de Oliveira wrote:
> After commit 1c74eeaf16b8 ("drm/i915: Move number of scalers initialization to
> runtime init"), scalers are not initialized properly for skl and glk
> since num_scalers is left as 0 for those platforms.
>
> Fixes: 1c74eeaf16b8 ("drm/i915: Move number of scalers initialization to runtime init")
> Cc: Nabendu Maiti <nabendu.bikash.maiti at intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk> (v2)
> Cc: Ander Conselvan de Oliveira <conselvan2 at gmail.com>
> Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira at intel.com>
> Cc: Daniel Vetter <daniel.vetter at intel.com>
> Cc: Jani Nikula <jani.nikula at linux.intel.com>
> Cc: intel-gfx at lists.freedesktop.org
> Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira at intel.com>
Fixes my CCS test. What happened was apparently the BIOS leaving the
scaler enabled and then when i915 took over all but the preferred mode
of the display came out garbled on account of the scaler output not
fitting within the h/vactive of the mode.
Tested-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_device_info.c | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index 1b5ffc4..f642f6d 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -310,6 +310,12 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
> struct intel_device_info *info = mkwrite_device_info(dev_priv);
> enum pipe pipe;
>
> + if (INTEL_GEN(dev_priv) >= 9) {
> + info->num_scalers[PIPE_A] = 2;
> + info->num_scalers[PIPE_B] = 2;
> + info->num_scalers[PIPE_C] = 1;
> + }
> +
> /*
> * Skylake and Broxton currently don't expose the topmost plane as its
> * use is exclusive with the legacy cursor and we only want to expose
> @@ -325,9 +331,6 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
> info->num_sprites[PIPE_A] = 2;
> info->num_sprites[PIPE_B] = 2;
> info->num_sprites[PIPE_C] = 1;
> - info->num_scalers[PIPE_A] = 2;
> - info->num_scalers[PIPE_B] = 2;
> - info->num_scalers[PIPE_C] = 1;
> } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> for_each_pipe(dev_priv, pipe)
> info->num_sprites[pipe] = 2;
> --
> 2.5.5
>
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--
Ville Syrjälä
Intel OTC
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