[Intel-gfx] [PATCH v2] drm/i915/glk: Convert a few more IS_BROXTON() to IS_GEN9_LP()

[Vivi, Rodrigo]

Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>

On Mon, 2017-01-09 at 16:51 +0200, Ander Conselvan de Oliveira wrote:
> From: Michel Thierry <michel.thierry at intel.com>
> 
> Commit cc3f90f0633c ("drm/i915/glk: Reuse broxton code for geminilake")
> missed a few of occurences of IS_BROXTON() that should have been
> coverted to IS_GEN9_LP().
> 
> v2: Cite the right commit. (Ander)
> 
> Fixes: cc3f90f0633c ("drm/i915/glk: Reuse broxton code for geminilake")
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira at intel.com>
> Cc: Daniel Vetter <daniel.vetter at intel.com>
> Cc: Jani Nikula <jani.nikula at linux.intel.com>
> Cc: intel-gfx at lists.freedesktop.org
> Signed-off-by: Michel Thierry <michel.thierry at intel.com>
> Signed-off-by: Tomasz Lis <tomasz.lis at intel.com>
> Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira at intel.com>
> Reviewed-by: Tomasz Lis <tomasz.lis at intel.com> (v1)
> ---
>  drivers/gpu/drm/i915/i915_sysfs.c        | 2 +-
>  drivers/gpu/drm/i915/intel_device_info.c | 2 +-
>  drivers/gpu/drm/i915/intel_dp.c          | 2 +-
>  drivers/gpu/drm/i915/intel_guc_loader.c  | 4 ++--
>  4 files changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
> index 40c0ac7..376ac95 100644
> --- a/drivers/gpu/drm/i915/i915_sysfs.c
> +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> @@ -58,7 +58,7 @@ static u32 calc_residency(struct drm_i915_private *dev_priv,
>  
>  		if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
>  			units <<= 8;
> -	} else if (IS_BROXTON(dev_priv)) {
> +	} else if (IS_GEN9_LP(dev_priv)) {
>  		units = 1;
>  		div = 1200;		/* 833.33ns */
>  	}
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index f642f6d..fcf8181 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -192,7 +192,7 @@ static void gen9_sseu_info_init(struct drm_i915_private *dev_priv)
>  		(IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) &&
>  		hweight8(sseu->slice_mask) > 1;
>  	sseu->has_subslice_pg =
> -		IS_BROXTON(dev_priv) && sseu_subslice_total(sseu) > 1;
> +		IS_GEN9_LP(dev_priv) && sseu_subslice_total(sseu) > 1;
>  	sseu->has_eu_pg = sseu->eu_per_subslice > 2;
>  
>  	if (IS_BROXTON(dev_priv)) {
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index fb12896..8c18f72 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -3412,7 +3412,7 @@ intel_dp_set_signal_levels(struct intel_dp *intel_dp)
>  	if (HAS_DDI(dev_priv)) {
>  		signal_levels = ddi_signal_levels(intel_dp);
>  
> -		if (IS_BROXTON(dev_priv))
> +		if (IS_GEN9_LP(dev_priv))
>  			signal_levels = 0;
>  		else
>  			mask = DDI_BUF_EMP_MASK;
> diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
> index 35d5690..aa2b866 100644
> --- a/drivers/gpu/drm/i915/intel_guc_loader.c
> +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
> @@ -339,7 +339,7 @@ static u32 guc_wopcm_size(struct drm_i915_private *dev_priv)
>  	u32 wopcm_size = GUC_WOPCM_TOP;
>  
>  	/* On BXT, the top of WOPCM is reserved for RC6 context */
> -	if (IS_BROXTON(dev_priv))
> +	if (IS_GEN9_LP(dev_priv))
>  		wopcm_size -= BXT_GUC_WOPCM_RC6_RESERVED;
>  
>  	return wopcm_size;
> @@ -388,7 +388,7 @@ static int guc_ucode_xfer(struct drm_i915_private *dev_priv)
>  	if (IS_BXT_REVID(dev_priv, 0, BXT_REVID_B0))
>  		I915_WRITE(GEN6_GFXPAUSE, 0x30FFF);
>  
> -	if (IS_BROXTON(dev_priv))
> +	if (IS_GEN9_LP(dev_priv))
>  		I915_WRITE(GEN9LP_GT_PM_CONFIG, GT_DOORBELL_ENABLE);
>  	else
>  		I915_WRITE(GEN9_GT_PM_CONFIG, GT_DOORBELL_ENABLE);