[Intel-gfx] [PATCH] drm/i915/bxt: Add MST support when do DPLL calculation
Jani Nikula
jani.nikula at intel.com
Wed Jan 11 09:11:46 UTC 2017
On Wed, 11 Jan 2017, "Lee, Shawn C" <shawn.c.lee at intel.com> wrote:
> From: "Lee, Shawn C" <shawn.c.lee at intel.com>
>
> Kernel oops was trigger by DP MST monitor/hub connected.
Copy paste the oops to the commit message please. It's *much* easier to
match bug reports and fixes this way.
There's likely a bug report, or several bug reports about this over at
FDO bugzilla. Any Bugzilla: references we should add?
When was this broken? Which commit does this fix? We should use a Fixes:
tag to identify it, so the fix can be backported to appropriate stable
kernels.
BR,
Jani.
> DP MST series patch already upstream and MST should
> be support also. MST monitor will display normally with this
> change on bxt platform.
>
> Cc: Jani Nikula <jani.nikula at intel.com>
> Reviewed-by: Cooper Chiou <cooper.chiou at intel.com>
> Reviewed-by: Gary C Wang <gary.c.wang at intel.com>
> Reviewed-by: Ciobanu, Nathan D <nathan.d.ciobanu at intel.com>
> Reviewed-by: Herbert, Marc <marc.herbert at intel.com>
> Reviewed-by: Sripada, Radhakrishna <radhakrishna.sripada at intel.com>
>
> Signed-off-by: Shawn Lee <shawn.c.lee at intel.com>
> ---
> drivers/gpu/drm/i915/intel_dpll_mgr.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> index c92a2558beb4..1a1d99d266ed 100644
> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> @@ -1855,7 +1855,8 @@ bool bxt_ddi_dp_set_dpll_hw_state(int clock,
> return NULL;
>
> if ((encoder->type == INTEL_OUTPUT_DP ||
> - encoder->type == INTEL_OUTPUT_EDP) &&
> + encoder->type == INTEL_OUTPUT_EDP ||
> + encoder->type == INTEL_OUTPUT_DP_MST ) &&
> !bxt_ddi_dp_set_dpll_hw_state(clock, &dpll_hw_state))
> return NULL;
--
Jani Nikula, Intel Open Source Technology Center
More information about the Intel-gfx
mailing list