[Intel-gfx] [PATCH] drm/i915/huc: Add HuC fw loading support

[Chris Wilson]

On Wed, Jan 11, 2017 at 03:13:29PM +0100, Michal Wajdeczko wrote:
> > +	vma = i915_gem_object_ggtt_pin(huc_fw->obj, NULL, 0, 0, 0);
> > +	if (IS_ERR(vma)) {
> > +		DRM_DEBUG_DRIVER("pin failed %d\n", (int)PTR_ERR(vma));
> > +		return PTR_ERR(vma);
> > +	}

Just asking a stupid question: Does the HuC have the same limitation as
the GuC on not being able to map certain ranges of the GuC? From the
earlier discussion on the failures, I got the impression the HuC had the
same limitations.

> > +
> > +	/* Invalidate GuC TLB to let GuC take the latest updates to GTT. */
> > +	I915_WRITE(GEN8_GTCR, GEN8_GTCR_INVALIDATE);
> > +
> > +	intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
> > +
> > +	/* init WOPCM */
> > +	I915_WRITE(GUC_WOPCM_SIZE, intel_guc_wopcm_size(dev_priv));
> > +	I915_WRITE(DMA_GUC_WOPCM_OFFSET, GUC_WOPCM_OFFSET_VALUE |
> > +			HUC_LOADING_AGENT_GUC);
> > +
> > +	/* Set the source address for the uCode */
> > +	offset = i915_ggtt_offset(vma) + huc_fw->header_offset;

If huc does have the same limits as the guc, please use guc_ggtt_offset()
for the extra verification on the address before use.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre