[Intel-gfx] [PATCH v6] drm: add fourcc codes for 16bit R and RG

[Ville Syrjälä]

On Wed, Jan 11, 2017 at 07:44:05AM -0800, Ben Widawsky wrote:
> On 17-01-11 17:05:04, Ville Syrjälä wrote:
> >On Thu, Jan 05, 2017 at 02:45:37PM +0100, Christian König wrote:
> >> Am 05.01.2017 um 12:37 schrieb Ville Syrjälä:
> >> > On Wed, Jan 04, 2017 at 07:38:55PM +0100, Rainer Hochecker wrote:
> >> >> From: Rainer Hochecker <fernetmenta at online.de>
> >> >>
> >> >> This adds fourcc codes for 16bit planes required for DRM buffer
> >> >> export to mesa.
> >> >>
> >> >> Signed-off-by: Rainer Hochecker <fernetmenta at online.de>
> >> > Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> >>
> >> Good to see some work landing on that part, patch is Acked-by: Christian
> >> König <christian.koenig at amd.com>.
> >
> >Has the userspace side of this been reviewed already?
> >
> >/me wonders if it's safe to push this...
> >
> 
> I acked the mesa side, and Rainer sent a version 2 which also looked fine to me.
> Let me bump that thread...

Thanks everyone. I've pushed this patch to drm-misc-next.

> 
> >>
> >> >
> >> >> ---
> >> >>   include/uapi/drm/drm_fourcc.h | 7 +++++++
> >> >>   1 file changed, 7 insertions(+)
> >> >>
> >> >> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> >> >> index a5890bf..d230e58 100644
> >> >> --- a/include/uapi/drm/drm_fourcc.h
> >> >> +++ b/include/uapi/drm/drm_fourcc.h
> >> >> @@ -41,10 +41,17 @@ extern "C" {
> >> >>   /* 8 bpp Red */
> >> >>   #define DRM_FORMAT_R8		fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
> >> >>
> >> >> +/* 16 bpp Red */
> >> >> +#define DRM_FORMAT_R16		fourcc_code('R', '1', '6', ' ') /* [15:0] R little endian */
> >> >> +
> >> >>   /* 16 bpp RG */
> >> >>   #define DRM_FORMAT_RG88		fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
> >> >>   #define DRM_FORMAT_GR88		fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
> >> >>
> >> >> +/* 32 bpp RG */
> >> >> +#define DRM_FORMAT_RG1616	fourcc_code('R', 'G', '3', '2') /* [31:0] R:G 16:16 little endian */
> >> >> +#define DRM_FORMAT_GR1616	fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
> >> >> +
> >> >>   /* 8 bpp RGB */
> >> >>   #define DRM_FORMAT_RGB332	fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
> >> >>   #define DRM_FORMAT_BGR233	fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
> >> >> --
> >> >> 2.9.3
> >>
> >
> >-- 
> >Ville Syrjälä
> >Intel OTC

-- 
Ville Syrjälä
Intel OTC