[Intel-gfx] [PATCH v2] drm/i915/bxt: Add MST support when do DPLL calculation

[Lee, Shawn C]

From: "Lee, Shawn C" <shawn.c.lee at intel.com>

Kernel oops was trigger by DP MST monitor/hub connected.
DP MST series patch already upstream and MST should
be support also. MST monitor will display normally with this
change on bxt platform.

Fixes: a277ca7dc01d ("drm/i915: Split bxt_ddi_pll_select()")
Cc: Jani Nikula <jani.nikula at intel.com>
Reviewed-by: Cooper Chiou <cooper.chiou at intel.com>
Reviewed-by: Gary C Wang <gary.c.wang at intel.com>
Reviewed-by: Ciobanu, Nathan D <nathan.d.ciobanu at intel.com>
Reviewed-by: Herbert, Marc <marc.herbert at intel.com>
Reviewed-by: Sripada, Radhakrishna <radhakrishna.sripada at intel.com>
Signed-off-by: Shawn Lee <shawn.c.lee at intel.com>"
---
 drivers/gpu/drm/i915/intel_dpll_mgr.c |    3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index c92a2558beb4..1a1d99d266ed 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -1855,7 +1855,8 @@ bool bxt_ddi_dp_set_dpll_hw_state(int clock,
 		return NULL;
 
 	if ((encoder->type == INTEL_OUTPUT_DP ||
-	     encoder->type == INTEL_OUTPUT_EDP) &&
+	     encoder->type == INTEL_OUTPUT_EDP ||
+	     encoder->type == INTEL_OUTPUT_DP_MST ) &&
 	    !bxt_ddi_dp_set_dpll_hw_state(clock, &dpll_hw_state))
 		return NULL;
 
-- 
1.7.9.5