[Intel-gfx] [PATCH] drm/i915: Remove useless casts to intel_plane_state

Ville Syrjälä ville.syrjala at linux.intel.com
Thu Jan 12 09:58:11 UTC 2017


On Thu, Jan 12, 2017 at 10:43:45AM +0100, Maarten Lankhorst wrote:
> The visible member used to be in intel_plane_state->visible,
> but has been moved to drm_plane_state->visible. In the conversion
> some casts were left in that are now useless.
> 
> to_intel_plane_state(x)->base.visible is the same as x->visible,
> so use the latter to clear up the code a little.

I would generally prefer switching over to intel_foo_state all over.

But patch looks sane anyway
Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

> 
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 12 ++++++------
>  drivers/gpu/drm/i915/intel_fbc.c     |  2 +-
>  2 files changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 5364724df57f..82cd0e27ba1f 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2796,7 +2796,7 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
>  	 * simplest solution is to just disable the primary plane now and
>  	 * pretend the BIOS never had it enabled.
>  	 */
> -	to_intel_plane_state(plane_state)->base.visible = false;
> +	plane_state->visible = false;
>  	crtc_state->plane_mask &= ~(1 << drm_plane_index(primary));
>  	intel_pre_disable_primary_noatomic(&intel_crtc->base);
>  	intel_plane->disable_plane(primary, &intel_crtc->base);
> @@ -6884,13 +6884,13 @@ static void intel_crtc_disable_noatomic(struct drm_crtc *crtc)
>  	if (!intel_crtc->active)
>  		return;
>  
> -	if (to_intel_plane_state(crtc->primary->state)->base.visible) {
> +	if (crtc->primary->state->visible) {
>  		WARN_ON(intel_crtc->flip_work);
>  
>  		intel_pre_disable_primary_noatomic(crtc);
>  
>  		intel_crtc_disable_planes(crtc, 1 << drm_plane_index(crtc->primary));
> -		to_intel_plane_state(crtc->primary->state)->base.visible = false;
> +		crtc->primary->state->visible = false;
>  	}
>  
>  	state = drm_atomic_state_alloc(crtc->dev);
> @@ -12464,7 +12464,7 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
>  	}
>  
>  	was_visible = old_plane_state->base.visible;
> -	visible = to_intel_plane_state(plane_state)->base.visible;
> +	visible = plane_state->visible;
>  
>  	if (!was_crtc_enabled && WARN_ON(was_visible))
>  		was_visible = false;
> @@ -12480,7 +12480,7 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
>  	 * only combine the results from all planes in the current place?
>  	 */
>  	if (!is_crtc_enabled)
> -		to_intel_plane_state(plane_state)->base.visible = visible = false;
> +		plane_state->visible = visible = false;
>  
>  	if (!was_visible && !visible)
>  		return 0;
> @@ -16841,7 +16841,7 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc)
>  		 * Temporarily change the plane mapping and disable everything
>  		 * ...  */
>  		plane = crtc->plane;
> -		to_intel_plane_state(crtc->base.primary->state)->base.visible = true;
> +		crtc->base.primary->state->visible = true;
>  		crtc->plane = !plane;
>  		intel_crtc_disable_noatomic(&crtc->base);
>  		crtc->plane = plane;
> diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
> index 26a81a9e9c1d..98cb85c88aff 100644
> --- a/drivers/gpu/drm/i915/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/intel_fbc.c
> @@ -1296,7 +1296,7 @@ void intel_fbc_init_pipe_state(struct drm_i915_private *dev_priv)
>  
>  	for_each_intel_crtc(&dev_priv->drm, crtc)
>  		if (intel_crtc_active(crtc) &&
> -		    to_intel_plane_state(crtc->base.primary->state)->base.visible)
> +		    crtc->base.primary->state->visible)
>  			dev_priv->fbc.visible_pipes_mask |= (1 << crtc->pipe);
>  }
>  
> -- 
> 2.7.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC


More information about the Intel-gfx mailing list