[Intel-gfx] [PATCH 14/37] drm/i915: Simple selftest to exercise live requests

[Tvrtko Ursulin]

On 11/01/2017 21:09, Chris Wilson wrote:
> Just create several batches of requests and expect it to not fall over!
>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> ---
>  drivers/gpu/drm/i915/selftests/i915_gem_request.c  | 78 ++++++++++++++++++++++
>  .../gpu/drm/i915/selftests/i915_live_selftests.h   |  1 +
>  2 files changed, 79 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_request.c b/drivers/gpu/drm/i915/selftests/i915_gem_request.c
> index f348f5f81351..63e69d360764 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_gem_request.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_gem_request.c
> @@ -22,6 +22,8 @@
>   *
>   */
>
> +#include <linux/prime_numbers.h>
> +
>  #include "i915_selftest.h"
>
>  #include "mock_gem_device.h"
> @@ -155,3 +157,79 @@ int i915_gem_request_mock_selftests(void)
>
>  	return err;
>  }
> +
> +static int live_nop_request(void *arg)
> +{
> +	I915_SELFTEST_TIMEOUT(end_time);
> +	struct drm_i915_private *i915 = arg;
> +	struct drm_i915_gem_request *request;
> +	unsigned int reset_count = i915_reset_count(&i915->gpu_error);
> +	unsigned long n, prime;
> +	ktime_t times[2] = {};
> +	int err;
> +
> +	mutex_lock(&i915->drm.struct_mutex);
> +
> +	err = i915_gem_wait_for_idle(i915, I915_WAIT_LOCKED);
> +	if (err) {
> +		pr_err("Failed to idle GPU before %s\n", __func__);
> +		goto out_unlock;
> +	}
> +
> +	i915->gpu_error.missed_irq_rings = 0;
> +
> +	for_each_prime_number_from(prime, 1, 8192) {

Feels like an overuse of primes. Wouldn't an exponential sequence make 
more sense here? Like 1, 10, 100, 1000, if not even 100 would be enough.

Also since it is a live test, might be cool to loop over the engines.

> +		times[1] = ktime_get_raw();
> +
> +		for (n = 0; n < prime; n++) {
> +			request = i915_gem_request_alloc(i915->engine[RCS],
> +							 i915->kernel_context);
> +			if (IS_ERR(request)) {
> +				err = PTR_ERR(request);
> +				goto out_unlock;
> +			}
> +
> +			i915_add_request(request);
> +		}
> +		i915_wait_request(request, I915_WAIT_LOCKED, MAX_SCHEDULE_TIMEOUT);
> +		times[1] = ktime_sub(ktime_get_raw(), times[1]);
> +		if (prime == 1)
> +			times[0] = times[1];
> +
> +		if (time_after(jiffies, end_time)) {
> +			pr_warn("%s timed out: last batch size %lu\n",
> +				__func__, prime);
> +			break;
> +		}
> +	}
> +
> +	if (reset_count != i915_reset_count(&i915->gpu_error)) {
> +		pr_err("GPU was reset %d times!\n",
> +		       i915_reset_count(&i915->gpu_error) - reset_count);
> +		err = -EIO;
> +		goto out_unlock;
> +	}
> +
> +	if (i915->gpu_error.missed_irq_rings) {
> +		pr_err("Missed interrupts on rings %lx\n",
> +		       i915->gpu_error.missed_irq_rings);
> +		err = -EIO;
> +		goto out_unlock;
> +	}
> +
> +	pr_info("Request latencies: 1 = %lluns, %lu = %lluns\n",
> +	       ktime_to_ns(times[0]),
> +	       prime, div64_u64(ktime_to_ns(times[1]), prime));
> +
> +out_unlock:
> +	mutex_unlock(&i915->drm.struct_mutex);
> +	return err;
> +}
> +
> +int i915_gem_request_live_selftests(struct drm_i915_private *i915)
> +{
> +	static const struct i915_subtest tests[] = {
> +		SUBTEST(live_nop_request),
> +	};
> +	return i915_subtests(tests, i915);
> +}
> diff --git a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
> index f3e17cb10e05..09bf538826df 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
> +++ b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
> @@ -9,3 +9,4 @@
>   * Tests are executed in order by igt/drv_selftest
>   */
>  selftest(sanitycheck, i915_live_sanitycheck) /* keep first (igt selfcheck) */
> +selftest(requests, i915_gem_request_live_selftests)
>

Regards,

Tvrtko