[Intel-gfx] [PATCH] drm/i915/huc: Support HuC authentication

Chris Wilson chris at chris-wilson.co.uk
Thu Jan 12 16:56:13 UTC 2017


On Thu, Jan 12, 2017 at 08:35:01AM -0800, Anusha Srivatsa wrote:
> diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
> index c6be352..f53ca8d 100644
> --- a/drivers/gpu/drm/i915/intel_uc.c
> +++ b/drivers/gpu/drm/i915/intel_uc.c
> @@ -46,7 +46,7 @@ static bool intel_guc_recv(struct intel_guc *guc, u32 *status)
>  int intel_guc_send(struct intel_guc *guc, const u32 *action, u32 len)
>  {
>  	struct drm_i915_private *dev_priv = guc_to_i915(guc);
> -	u32 status;
> +	u32 status = 0;
>  	int i;
>  	int ret;

This chunk is unrelated.

> +void intel_guc_auth_huc(struct drm_i915_private *dev_priv)
> +{
> +	struct intel_guc *guc = &dev_priv->guc;
> +	struct intel_huc *huc = &dev_priv->huc;
> +	struct i915_vma *vma;
> +	int ret;
> +	u32 data[2];
> +
> +	vma = i915_gem_object_ggtt_pin(huc->fw.obj, NULL, 0, 0,
> +				PIN_OFFSET_BIAS | GUC_WOPCM_TOP);
> +	if (IS_ERR(vma)) {
> +		DRM_DEBUG_DRIVER("failed to pin huc fw object %d\n",
> +				(int)PTR_ERR(vma));
> +		return;
> +	}
> +
> +	/* Invalidate GuC TLB to let GuC take the latest updates to GTT. */
> +	I915_WRITE(GEN8_GTCR, GEN8_GTCR_INVALIDATE);

This invalidate will be redundant shortly.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre


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