[Intel-gfx] [PATCH 3/8] drm/i915/huc: Add HuC fw loading support
Srivatsa, Anusha
anusha.srivatsa at intel.com
Fri Jan 13 17:37:05 UTC 2017
>-----Original Message-----
>From: Chris Wilson [mailto:chris at chris-wilson.co.uk]
>Sent: Friday, January 13, 2017 9:16 AM
>To: Srivatsa, Anusha <anusha.srivatsa at intel.com>
>Cc: intel-gfx at lists.freedesktop.org; Alex Dai <yu.dai at intel.com>; Peter Antoine
><peter.antoine at intel.com>
>Subject: Re: [Intel-gfx] [PATCH 3/8] drm/i915/huc: Add HuC fw loading support
>
>On Fri, Jan 13, 2017 at 09:06:34AM -0800, Anusha Srivatsa wrote:
>> +/**
>> + * huc_ucode_xfer() - DMA's the firmware
>> + * @dev_priv: the drm_i915_private device
>> + *
>> + * Transfer the firmware image to RAM for execution by the microcontroller.
>> + *
>> + * Return: 0 on success, non-zero on failure */ static int
>> +huc_ucode_xfer(struct drm_i915_private *dev_priv) {
>> + struct intel_uc_fw *huc_fw = &dev_priv->huc.fw;
>> + struct i915_vma *vma;
>> + unsigned long offset = 0;
>> + u32 size;
>> + int ret;
>> +
>> + ret = i915_gem_object_set_to_gtt_domain(huc_fw->obj, false);
>> + if (ret) {
>> + DRM_DEBUG_DRIVER("set-domain failed %d\n", ret);
>> + return ret;
>> + }
>> +
>> + vma = i915_gem_object_ggtt_pin(huc_fw->obj, NULL, 0, 0,
>> + PIN_OFFSET_BIAS | GUC_WOPCM_TOP);
>> + if (IS_ERR(vma)) {
>> + DRM_DEBUG_DRIVER("pin failed %d\n", (int)PTR_ERR(vma));
>> + return PTR_ERR(vma);
>> + }
>> +
>> + /* Invalidate GuC TLB to let GuC take the latest updates to GTT. */
>> + I915_WRITE(GEN8_GTCR, GEN8_GTCR_INVALIDATE);
>
>This invalidate is not required anymore.
>-Chris
When you previously mentioned, I did not expect it to become invalid so soon :)
Will remove it. Thanks.
Anusha
>--
>Chris Wilson, Intel Open Source Technology Centre
More information about the Intel-gfx
mailing list