[Intel-gfx] [PATCH 17/37] drm/i915: Test partial mappings

[Matthew Auld]

On 11 January 2017 at 21:09, Chris Wilson <chris at chris-wilson.co.uk> wrote:
> Create partial mappings to cover a large object, investigating tiling
> (fenced regions) and VMA reuse.
>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> ---
>  drivers/gpu/drm/i915/selftests/i915_gem_object.c | 252 +++++++++++++++++++++++
>  1 file changed, 252 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_object.c b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> index 08e6b49b1e77..df3625f551aa 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> @@ -132,6 +132,257 @@ static int igt_gem_huge(void *arg)
>         return err;
>  }
>
> +struct tile {
> +       unsigned int width;
> +       unsigned int height;
> +       unsigned int stride;
> +       unsigned int size;
> +       unsigned int tiling;
> +       unsigned int swizzle;
> +};
> +
> +static u64 swizzle_bit(unsigned bit, u64 offset)
> +{
> +       return (offset & BIT_ULL(bit)) >> (bit - 6);
> +}
> +
> +static u64 tiled_offset(const struct tile *tile, u64 v)
> +{
> +       u64 x, y;
> +
> +       if (tile->tiling == I915_TILING_NONE)
> +               return v;
> +
> +       switch (tile->swizzle) {
> +       case I915_BIT_6_SWIZZLE_9:
> +               v ^= swizzle_bit(9, v);
> +               break;
> +       case I915_BIT_6_SWIZZLE_9_10:
> +               v ^= swizzle_bit(9, v) ^ swizzle_bit(10, v);
> +               break;
> +       case I915_BIT_6_SWIZZLE_9_11:
> +               v ^= swizzle_bit(9, v) ^ swizzle_bit(11, v);
> +               break;
> +       case I915_BIT_6_SWIZZLE_9_10_11:
> +               v ^= swizzle_bit(9, v) ^ swizzle_bit(10, v) ^ swizzle_bit(11, v);
> +               break;
> +       }
> +
> +       y = div64_u64_rem(v, tile->stride, &x);
> +       v = div64_u64_rem(y, tile->height, &y) * tile->stride * tile->height;
> +
> +       if (tile->tiling == I915_TILING_X) {
> +               v += y * tile->width;
> +               v += div64_u64_rem(x, tile->width, &x) << tile->size;
> +               v += x;
> +       } else {
> +               const unsigned int ytile_span = 16;
> +               const unsigned int ytile_height = 32 * ytile_span;
I don't follow this part, is this a smaller tile within a tile ?