[Intel-gfx] [PATCH] drm/i915: use variadic macros and arrays to choose port/pipe based registers

[Jani Nikula]

On Fri, 27 Jan 2017, Chris Wilson <chris at chris-wilson.co.uk> wrote:
> On Fri, Jan 27, 2017 at 05:57:06PM +0200, Jani Nikula wrote:
>> This allows the use of more than 3 ports/pipes/whatever without tricks,
>> even if the register offsets are not evenly spaced.
>> 
>> There's the risk of out of bounds access if we're not careful; currently
>> that would "just" lead to the wrong register offset being used. It might
>> be possible to add build bug ons for build time constant indexing.
>> 
>> We already have ports defined up to E, not sure if we might have bugs
>> related to them and the current _PORT3() macro.
>> 
>>    text	   data	    bss	    dec	    hex	filename
>> 1239868	  46199	   4096	1290163	 13afb3	drivers/gpu/drm/i915/i915.ko
>> 1238828	  46199	   4096	1289123	 13aba3	drivers/gpu/drm/i915/i915.ko
>> 
>> Cc: Chris Wilson <chris at chris-wilson.co.uk>
>> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
>> Cc: Tvrtko Ursulin <tursulin at ursulin.net>
>> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
>> ---
>>  drivers/gpu/drm/i915/i915_reg.h | 11 +++++------
>>  1 file changed, 5 insertions(+), 6 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>> index 672cb102f477..c6435a447300 100644
>> --- a/drivers/gpu/drm/i915/i915_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>> @@ -48,6 +48,8 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
>>  	return !i915_mmio_reg_equal(reg, INVALID_MMIO_REG);
>>  }
>>  
>> +#define _PICK(__index, ...) (((const u32 []){ __VA_ARGS__ })[__index])
>
> Very neat. The danger is that for a variable index, the compiler will
> plonk the array on the stack, for each invocation. Though for a constant
> the compiler will see through it and generate the right constant.
>
> https://godbolt.org/g/YCK1od
>
> Given that it looks like the compiler will get smarter, this looks like
> a much less error prone way of writing these.
>
> Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>

Thanks for the reviews, pushed to drm-intel-next-queued with Daniel's
IRC ack added on top.

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Technology Center