[Intel-gfx] [PATCH i-g-t v2] tests/gem_mocs_settings: Fix LNCFCMOCS testing and extract the subtests

[Arkadiusz Hiler]

On Tue, Jul 04, 2017 at 04:43:08PM +0200, Michał Winiarski wrote:
> Testing LNCFCMOCS values on non-render engines is tricky. The values in
> those registers are lost on RC6, which means that if users of non-render
> engines want to see the proper values, they need to obtain a forcewake
> and execute something on render (relying on it to restore the values)
> before using non-render engine.
> Previous version of the test did exactly that - we were relying on the
> fact that we're taking forcewake (hidden by intel_register_access_init,
> even though the test is not doing any mmio accesses) before iterating
> through engines (and render is before other engines, so job done).
> I really hope that this is not an ABI and those registers are not used
> on non-render in any way. Let's limit testing LNCFCMOCS to render
> engine only.
> The other non-render issue is that when we're using I915_EXEC_BSD, we
> can't be sure which BSD ring we'll end up executing on. Let's
> explicitly select BSD1 and BSD2 in our tests.
> While we're here, let's also remove the duplicated code and add some
> structure by extracting moving more content into subtests.
> We're only doing tests that involve "dirtying" the registers for the
> render engine - since it's the only one that has those registers in its
> context.
> 
> v2: Do not skip all BSD engines, test non-default contexts on render
> only, change names in CI extended.testlist
> 
> Cc: Arkadiusz Hiler <arkadiusz.hiler at intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: David Weinehall <david.weinehall at linux.intel.com>
> Cc: Łukasz Kałamarz <lukasz.kalamarz at intel.com>
> Signed-off-by: Michał Winiarski <michal.winiarski at intel.com>
> Reviewed-by: Łukasz Kałamarz <lukasz.kalamarz at intel.com>

pushed

thanks for the patch and the review

-- 
Cheers,
Arek