[Intel-gfx] [PATCH] drm/i915/cnl: Add force wake for gen10+.

[Rodrigo Vivi]

Merged to dinq. Thanks for review.

On Wed, Jul 5, 2017 at 6:00 PM, Rodrigo Vivi <rodrigo.vivi at intel.com> wrote:
> By spec there is no change on force wake registers
> for Cannonlake. Let's reuse gen9 one.
>
> v2: Adding missing case for the write part. (Tvrtko)
> v3: Rebase on recent tree.
> v4: Make it for gen9+ instead adding gen10 only. (by Joonas).
>
> Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Reviewed-by: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_uncore.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 1ed3dd8..deb4430 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -643,7 +643,7 @@ static int fw_range_cmp(u32 offset, const struct intel_forcewake_range *entry)
>         { .start = (s), .end = (e), .domains = (d) }
>
>  #define HAS_FWTABLE(dev_priv) \
> -       (IS_GEN9(dev_priv) || \
> +       (INTEL_GEN(dev_priv) >= 9 || \
>          IS_CHERRYVIEW(dev_priv) || \
>          IS_VALLEYVIEW(dev_priv))
>
> @@ -1072,7 +1072,7 @@ static void intel_uncore_fw_domains_init(struct drm_i915_private *dev_priv)
>                 dev_priv->uncore.fw_clear = _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL);
>         }
>
> -       if (IS_GEN9(dev_priv)) {
> +       if (INTEL_GEN(dev_priv) >= 9) {
>                 dev_priv->uncore.funcs.force_wake_get = fw_domains_get;
>                 dev_priv->uncore.funcs.force_wake_put = fw_domains_put;
>                 fw_domain_init(dev_priv, FW_DOMAIN_ID_RENDER,
> --
> 1.9.1
>
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-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br