[Intel-gfx] [PATCH 5/8] drm/i915: Upscale scaler max scale for NV12
Ville Syrjälä
ville.syrjala at linux.intel.com
Tue Jul 11 16:16:18 UTC 2017
On Tue, Jul 11, 2017 at 07:40:53PM +0530, Vidya Srinivas wrote:
> From: Chandra Konduru <chandra.konduru at intel.com>
>
> This patch updates scaler max limit support for NV12
>
> v2: Rebased (me)
>
> v3: Rebased (me)
>
> v4: Missed the Tested-by/Reviewed-by in the previous series
> Adding the same to commit message in this version.
>
> Tested-by: Clinton Taylor <clinton.a.taylor at intel.com>
> Reviewed-by: Clinton Taylor <clinton.a.taylor at intel.com>
> Signed-off-by: Chandra Konduru <chandra.konduru at intel.com>
> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti at intel.com>
> Signed-off-by: Vidya Srinivas <vidya.srinivas at intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 28 ++++++++++++++++++++--------
> drivers/gpu/drm/i915/intel_drv.h | 3 ++-
> drivers/gpu/drm/i915/intel_sprite.c | 3 ++-
> 3 files changed, 24 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 8b3cea4..2fb267d 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -3438,6 +3438,8 @@ static u32 skl_plane_ctl_format(uint32_t pixel_format)
> return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_UYVY;
> case DRM_FORMAT_VYUY:
> return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_VYUY;
> + case DRM_FORMAT_NV12:
> + return PLANE_CTL_FORMAT_NV12;
> default:
> MISSING_CASE(pixel_format);
> }
> @@ -4801,7 +4803,8 @@ static void cpt_verify_modeset(struct drm_device *dev, int pipe)
> static int
> skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
> unsigned int scaler_user, int *scaler_id,
> - int src_w, int src_h, int dst_w, int dst_h)
> + int src_w, int src_h, int dst_w, int dst_h,
> + uint32_t pixel_format)
> {
> struct intel_crtc_scaler_state *scaler_state =
> &crtc_state->scaler_state;
> @@ -4817,7 +4820,8 @@ static void cpt_verify_modeset(struct drm_device *dev, int pipe)
> * the 90/270 degree plane rotation cases (to match the
> * GTT mapping), hence no need to account for rotation here.
> */
> - need_scaling = src_w != dst_w || src_h != dst_h;
> + need_scaling = src_w != dst_w || src_h != dst_h ||
> + (pixel_format == DRM_FORMAT_NV12);
Indentation is still messed in many places in the series.
>
> /*
> * Scaling/fitting not supported in IF-ID mode in GEN9+
> @@ -4893,7 +4897,7 @@ int skl_update_scaler_crtc(struct intel_crtc_state *state)
> return skl_update_scaler(state, !state->base.active, SKL_CRTC_INDEX,
> &state->scaler_state.scaler_id,
> state->pipe_src_w, state->pipe_src_h,
> - adjusted_mode->crtc_hdisplay, adjusted_mode->crtc_vdisplay);
> + adjusted_mode->crtc_hdisplay, adjusted_mode->crtc_vdisplay, 0);
> }
>
> /**
> @@ -4923,7 +4927,8 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
> drm_rect_width(&plane_state->base.src) >> 16,
> drm_rect_height(&plane_state->base.src) >> 16,
> drm_rect_width(&plane_state->base.dst),
> - drm_rect_height(&plane_state->base.dst));
> + drm_rect_height(&plane_state->base.dst),
> + fb ? fb->format->format : 0);
>
> if (ret || plane_state->scaler_id < 0)
> return ret;
> @@ -4949,6 +4954,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
> case DRM_FORMAT_YVYU:
> case DRM_FORMAT_UYVY:
> case DRM_FORMAT_VYUY:
> + case DRM_FORMAT_NV12:
> break;
> default:
> DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
> @@ -13656,7 +13662,8 @@ static int intel_atomic_commit(struct drm_device *dev,
> }
>
> int
> -skl_max_scale(struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state)
> +skl_max_scale(struct intel_crtc *intel_crtc,
> + struct intel_crtc_state *crtc_state, uint32_t pixel_format)
> {
> struct drm_i915_private *dev_priv;
> int max_scale;
> @@ -13682,8 +13689,9 @@ static int intel_atomic_commit(struct drm_device *dev,
> * or
> * cdclk/crtc_clock
> */
> - max_scale = min((1 << 16) * 3 - 1,
> - (1 << 8) * ((max_dotclk << 8) / crtc_clock));
> + max_scale = min((1 << 16) *
> + (pixel_format == DRM_FORMAT_NV12 ? 2 : 3) - 1,
> + (1 << 8) * ((max_dotclk << 8) / crtc_clock));
IIRC I already suggested to make this less convoluted by
splitting it up a bit.
>
> return max_scale;
> }
> @@ -13704,7 +13712,11 @@ static int intel_atomic_commit(struct drm_device *dev,
> /* use scaler when colorkey is not required */
> if (state->ckey.flags == I915_SET_COLORKEY_NONE) {
> min_scale = 1;
> - max_scale = skl_max_scale(to_intel_crtc(crtc), crtc_state);
> + max_scale = skl_max_scale(to_intel_crtc(crtc),
> + crtc_state,
> + state->base.fb ?
> + state->base.fb->format->format :
> + 0);
> }
> can_position = true;
> }
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index d17a324..0576d4b 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1480,7 +1480,8 @@ void intel_mode_from_pipe_config(struct drm_display_mode *mode,
> struct intel_crtc_state *pipe_config);
>
> int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state);
> -int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state);
> +int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
> + uint32_t pixel_format);
>
> static inline u32 intel_plane_ggtt_offset(const struct intel_plane_state *state)
> {
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index 8deb635..9a6b011 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -823,7 +823,8 @@ static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state,
> if (state->ckey.flags == I915_SET_COLORKEY_NONE) {
> can_scale = 1;
> min_scale = 1;
> - max_scale = skl_max_scale(crtc, crtc_state);
> + max_scale = skl_max_scale(crtc, crtc_state,
> + fb->format->format);
> } else {
> can_scale = 0;
> min_scale = DRM_PLANE_HELPER_NO_SCALING;
> --
> 1.9.1
>
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--
Ville Syrjälä
Intel OTC
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