[Intel-gfx] [PATCH 04/18] drm/i915/gen2: Add an ID for the display pipes power well
Ville Syrjälä
ville.syrjala at linux.intel.com
Tue Jul 11 17:01:50 UTC 2017
On Thu, Jul 06, 2017 at 05:40:26PM +0300, Imre Deak wrote:
> Make the GEN2 power well ID assignment explicit for consistency.
>
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak at intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 6 ++++++
> drivers/gpu/drm/i915/intel_runtime_pm.c | 1 +
> 2 files changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index e4135bd..ce90847 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1073,6 +1073,12 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
> */
> enum i915_power_well_id {
> /*
> + * GEN2
Just 830 actually. Rest of gen2 don't have this.
> + * - custom power well
> + */
> + I830_DISP_PW_PIPES = 0,
> +
> + /*
> * VLV/CHV
> * - PUNIT_REG_PWRGT_CTRL, PUNIT_REG_PWRGT_STATUS (PUNIT HAS v0.8)
> */
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 9601b62..4a9d955 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -2036,6 +2036,7 @@ static struct i915_power_well i830_power_wells[] = {
> .name = "pipes",
> .domains = I830_PIPES_POWER_DOMAINS,
> .ops = &i830_pipes_power_well_ops,
> + .id = I830_DISP_PW_PIPES,
> },
> };
>
> --
> 2.7.4
--
Ville Syrjälä
Intel OTC
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