[Intel-gfx] [PATCH] drm/i915/guc: Don't make assumptions while getting the lrca offset

[Chris Wilson]

Quoting Michel Thierry (2017-07-12 02:01:29)
> On 7/11/2017 5:54 PM, Chris Wilson wrote:
> > /* We allocate a header at the start of the context image for our own
> >   * use, therefore the actual location of the logical state is offset
> >   * from the start of the VMA. The layout is
> >   *
> >   * | [guc]          | [hwsp] [logical state] |
> >   * |<- our header ->|<- context image      ->|
> >   *
> >   */
> > 
> > /* One extra page is used for sharing with the GuC */
> > #define LRC_GUCSHR_PN  (0)
> > #define LRC_GUCSHR_PAGES 1
> > 
> > /* At the start of the context image is its per-process HWS page */
> > #define LRC_PPHWSP_PN  (LRC_GUCSHR_PN + LRC_GUCSHR_PAGES)
> > 
> > /* Finally we have the logical state for the context */
> > #define LRC_STATE_PN   (LRC_PPHWSP_PN + 1)
> > 
> > /* Currently we include the PPHWSP in __intel_engine_context_size() so
> >   * the size of the header is synonymous with the start of the PPHWSP.
> >   */
> > #define LRC_HEADER_PAGES LRC_PPHWSP_PN
> > 
> 
> It cannot be clearer now.
> 
> The only extra thing I was thinking about was also defining the 'size' 
> (length?) of the guc and pphwsp sections, in case those "+ 1" were not 
> clear:
> 
> 
>   #define LRC_GUCSHR_PN  (0)
> -#define LRC_PPHWSP_PN  (LRC_GUCSHR_PN + 1)
> -#define LRC_STATE_PN   (LRC_PPHWSP_PN + 1)
> +#define LRC_GUCSHR_SZ  (1)
> +#define LRC_PPHWSP_PN  (LRC_GUCSHR_PN + LRC_GUCSHR_SZ)
> +#define LRC_PPHWSP_SZ  (1)
> +#define LRC_STATE_PN   (LRC_PPHWSP_PN + LRC_PPHWSP_SZ)

Yes, I erred on the side of laziness thinking that this is common enough
that there should be a generator somewhere, but was to lazy to
find/write one.
-Chris