[Intel-gfx] [PATCH v2 4/5] drm/i915/execlists: Read the context-status buffer from the HWSP

Zhenyu Wang zhenyuw at linux.intel.com
Thu Jul 13 09:37:50 UTC 2017


On 2017.07.13 10:32:38 +0100, Chris Wilson wrote:
> Quoting Zhenyu Wang (2017-07-13 10:14:34)
> > On 2017.07.13 10:00:25 +0100, Chris Wilson wrote:
> > > The engine provides a mirror of the CSB in the HWSP. If we use the
> > > cacheable reads from the HWSP, we can shave off a few mmio reads per
> > > context-switch interrupt (which are quite frequent!). Just removing a
> > > couple of mmio is not enough to actually reduce any latency, but a small
> > > reduction in overall cpu usage.
> > 
> > Unfortunately current gvt's execlist emulation depends on MMIO CSB read
> > for guest workload without guest HWSP update. So this can't work for guest.
> > We need to fix that in gvt, also reduce MMIO trap is good benefit for vGPU too.
> > But might have to fallback to mmio mode if vgpu active now, and once gvt host
> > got fixed, will notify through pvinfo to enable this.
> 
> Is there any chance you can work with Tomi to get a gvt-g test host in
> CI, or provide a similar CI service for gvt (would have to be coupled
> into trybot as well)?
>

cc Terence. I haven't heard news on that part, although I think it
should be easy with setup if you prepared VM image with IGT loaded.

> Also I will have to try to remember to cc you on any execlists/guc patches
> in future.

my pleasure

-- 
Open Source Technology Center, Intel ltd.

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