[Intel-gfx] [PATCH v7 3/3] drm/i915: Implement I915_PERF_ADD/REMOVE_CONFIG interface

[Datczuk, Andrzej]

I think you looked only at the changes prepared previously by Matthew and just ported by me. I made a change on top of it in a third patch to alight the whitelist with MDAPI needs. 
The change you're looking for is "Subject: [PATCH 3/3] drm/i915: extended oa reg addresses whitelist". To make it easier below is the list:

Perf modified 							Perf modified Name 
<0x2710,2b00), 0x2b04 						b_counter
0xE458, 0xE45C, 0xE558, 0xE55C, 0xE658, 0xE65C, 0xE758 	flex
<0x9800,0x9ec0> 						mux 
<0x25100,0x2ff90> 						mux 
<0xD04,0xD2C>, 0xE180 					mux 
<0x182300,0x1823A4> 						mux 
0x20CC 								mux 
<0x91B8,0x91C8> 						mux

Regards,
Andrzej

-----Original Message-----
From: Landwerlin, Lionel G 
Sent: Tuesday, July 25, 2017 12:52 PM
To: Datczuk, Andrzej <andrzej.datczuk at intel.com>; intel-gfx at lists.freedesktop.org
Cc: Auld, Matthew <matthew.auld at intel.com>; chris at chris-wilson.co.uk
Subject: Re: [PATCH v7 3/3] drm/i915: Implement I915_PERF_ADD/REMOVE_CONFIG interface

Hi Andrzej,

Thanks for the feedback. Can you tell me if that following changes are correct?

Cheers,

-
Lionel

On 25/07/17 10:06, Datczuk, Andrzej wrote:
> Hi Lionel,
>
> What about the corrected whitelist I sent you before? Without allowing those registers the patch for MDAPI is basically useless.
> FYI The whitelist from the patches I sent you contained merged ranges for gen7-9 platforms.
>
> Regards,
> Andrzej
>
>   
> +static bool gen8_is_valid_flex_addr(struct drm_i915_private 
> +*dev_priv,
> +u32 addr) {
> +	static const i915_reg_t flex_eu_regs[] = {
> +		EU_PERF_CNTL0,
> +		EU_PERF_CNTL1,
> +		EU_PERF_CNTL2,
> +		EU_PERF_CNTL3,
> +		EU_PERF_CNTL4,
> +		EU_PERF_CNTL5,
> +		EU_PERF_CNTL6,
> +	};
> +	int i;
> +
> +	for (i = 0; i < ARRAY_SIZE(flex_eu_regs); i++) {
> +		if (flex_eu_regs[i].reg == addr)
> +			return true;
> +	}
> +	return false;
> +}
> +
> +static bool gen7_is_valid_b_counter_addr(struct drm_i915_private 
> +*dev_priv, u32 addr) {
> +	return (addr >= 0x2380 && addr <= 0x27ac); }

Here I dropped 0x2b20 because it's an interruption register. It probably should be left to its default value and only managed by the kernel.

Though I made a mistake as this should be addr >= 0x2374 && addr <= 0x27ac.

> +
> +static bool gen7_is_valid_mux_addr(struct drm_i915_private *dev_priv,
> +u32 addr) {
> +	return addr == NOA_WRITE.reg ||
> +		(addr >= 0xd0c && addr <= 0xd3c) ||

Arg, missing 0xd24/0xd28 here...

> +		(addr >= 0x25100 && addr <= 0x2FB9C); }
> +
> +static bool hsw_is_valid_mux_addr(struct drm_i915_private *dev_priv,
> +u32 addr) {
> +	return (addr >= 0x25100 && addr <= 0x2FF90) ||
> +		gen7_is_valid_mux_addr(dev_priv, addr); }
> +
> +static bool chv_is_valid_mux_addr(struct drm_i915_private *dev_priv,
> +u32 addr) {
> +	return (addr >= 0x182300 && addr <= 0x1823A4) ||
> +		gen7_is_valid_mux_addr(dev_priv, addr); }
> +
> +

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