[Intel-gfx] [PATCH 0/8] Adding NV12 support

[Daniel Vetter]

On Mon, Jul 31, 2017 at 12:34:45PM +0530, Vidya Srinivas wrote:
> This patch series is adding NV12 support for Broxton display after
> rebasing on latest drm-intel-nightly. Initial series of the patches
> can be found here:
> https://lists.freedesktop.org/archives/intel-gfx/2015-May/066786.html
> 
> Feature has been currently tested with custom linux based test tool
> IGT test development is under progress. Floating these patches for
> initial review. These NV12 patches are dependent on Ville's patches
> mentioned below.
> 
> Update from last rev:
> Patches were initial reviewed last when floated but
> currently there was a design change with respect to
> - the way fb offset is handled
> - the way rotation is handled
> Rebase of the current NV12 patch series has been done as per the
> current changes on drm-intel-nightly.
> Review comments from Ville (12th June 2017) have been addressed
> Review comments from Clinton A Taylor (7th July 2017) have been
> addressed
> Review comments from Clinton A Taylor (10th July 2017) have been
> addressed. Had missed out tested-by/reviewed-by in the patches.
> Fixed that error in this series.
> Review comments from Ville (11th July 2017) addressed.
> Review comments from Paauwe, Bob (29th July 2017) addressed.

Do we have a solid set of igt testcases for this (including against stuff
like rotation, checking all the planes/crtc combos, scaling and
placement)? Plus making sure that it all works with atomic updates too?

Thanks, Daniel

> 
> Chandra Konduru (6):
>   drm/i915: Set scaler mode for NV12
>   drm/i915: Update format_is_yuv() to include NV12
>   drm/i915: Upscale scaler max scale for NV12
>   drm/i915: Add NV12 as supported format for primary plane
>   drm/i915: Add NV12 as supported format for sprite plane
>   drm/i915: Add NV12 support to intel_framebuffer_init
> 
> Ville Syrjälä (2):
>   drm/i915: Implement .get_format_info() hook for CCS
>   SKL+ display engine can scan out certain kinds of compressed surfaces
>     produced by the render engine. This involved telling the display
>     engine the location of the color control surfae (CCS) which
>     describes which parts of the main surface are compressed and which
>     are not. The location of CCS is provided by userspace as just
>     another plane with its own offset.
> 
>  drivers/gpu/drm/i915/i915_reg.h      |  24 +++
>  drivers/gpu/drm/i915/intel_atomic.c  |   8 +-
>  drivers/gpu/drm/i915/intel_display.c | 345 ++++++++++++++++++++++++++++++++---
>  drivers/gpu/drm/i915/intel_drv.h     |   3 +-
>  drivers/gpu/drm/i915/intel_pm.c      |  29 ++-
>  drivers/gpu/drm/i915/intel_sprite.c  |  38 +++-
>  include/uapi/drm/drm_fourcc.h        |  20 ++
>  7 files changed, 428 insertions(+), 39 deletions(-)
> 
> -- 
> 1.9.1
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch