[Intel-gfx] [PATCH v8 2/6] drm/i915/perf: prune OA configs

[Matthew Auld]

On 07/28, Lionel Landwerlin wrote:
> In the following commit we'll introduce loadable userspace
> configs. This change reworks how configurations are handled in the
> perf driver and retains only the test configurations in kernel space.
> 
> We now store the test config in dev_priv and resolve the id only once
> when opening the perf stream. The OA config is then handled through a
> pointer to the structure holding the configuration details.
> 
> v2: Rework how test configs are handled (Lionel)
> 
> v3: Use u32 to hold number of register (Matthew)
> 
> v4: Removed unused dev_priv->perf.oa.current_config variable (Matthew)
> 
> v5: Lock device when accessing exclusive_stream (Lionel)
> 
> v6: Ensure OACTXCONTROL is always reprogrammed (Lionel)
> 
> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
> ---

<SNIP>

> @@ -1529,11 +1523,10 @@ static void hsw_disable_metric_set(struct drm_i915_private *dev_priv)
>   * in the case that the OA unit has been disabled.
>   */
>  static void gen8_update_reg_state_unlocked(struct i915_gem_context *ctx,
> -					   u32 *reg_state)
> +					   u32 *reg_state,
> +					   const struct i915_oa_config *oa_config)
>  {
>  	struct drm_i915_private *dev_priv = ctx->i915;
> -	const struct i915_oa_reg *flex_regs = dev_priv->perf.oa.flex_regs;
> -	int n_flex_regs = dev_priv->perf.oa.flex_regs_len;
>  	u32 ctx_oactxctrl = dev_priv->perf.oa.ctx_oactxctrl_offset;
>  	u32 ctx_flexeu0 = dev_priv->perf.oa.ctx_flexeu0_offset;
>  	/* The MMIO offsets for Flex EU registers aren't contiguous */
> @@ -1565,12 +1558,15 @@ static void gen8_update_reg_state_unlocked(struct i915_gem_context *ctx,
>  		 * will be an explicit 'No Event' we can select, but not yet...
>  		 */
>  		u32 value = 0;
> -		int j;
>  
> -		for (j = 0; j < n_flex_regs; j++) {
> -			if (i915_mmio_reg_offset(flex_regs[j].addr) == mmio) {
> -				value = flex_regs[j].value;
> -				break;
> +		if (oa_config) {
> +			int j;
u32 j; the other one also.

Reviewed-by: Matthew Auld <matthew.auld at intel.com>