[Intel-gfx] [PATCH 08/11] drm/i915/cnl: Cannonlake has same MOCS table than Skylake.

Rodrigo Vivi rodrigo.vivi at intel.com
Tue Jun 6 20:30:37 UTC 2017


All registers and default configuration are the same for Skylake
and Cannonlake.

v2: Don't apply Wa for platforms without MOCS. (Paulo)

v3: Removed WaDisableSkipCaching that Joonas noticed that
according to spec it is not applicable to CNL.

Cc: Paulo Zanoni <paulo.r.zanoni at intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
---
 drivers/gpu/drm/i915/intel_mocs.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_mocs.c b/drivers/gpu/drm/i915/intel_mocs.c
index 92e461c..f4c46b0 100644
--- a/drivers/gpu/drm/i915/intel_mocs.c
+++ b/drivers/gpu/drm/i915/intel_mocs.c
@@ -178,7 +178,7 @@ static bool get_mocs_settings(struct drm_i915_private *dev_priv,
 {
 	bool result = false;
 
-	if (IS_GEN9_BC(dev_priv)) {
+	if (IS_GEN9_BC(dev_priv) || IS_CANNONLAKE(dev_priv)) {
 		table->size  = ARRAY_SIZE(skylake_mocs_table);
 		table->table = skylake_mocs_table;
 		result = true;
-- 
1.9.1



More information about the Intel-gfx mailing list