[Intel-gfx] [PATCH] drm/i915: Unify GT* and GT3 definitions

[Rodrigo Vivi]

patch merged to dinq
thanks for all comments and reviews

On Tue, Jun 6, 2017 at 2:58 PM, Srivatsa, Anusha
<anusha.srivatsa at intel.com> wrote:
>
>
>>-----Original Message-----
>>From: Vivi, Rodrigo
>>Sent: Tuesday, June 6, 2017 9:06 AM
>>To: intel-gfx at lists.freedesktop.org
>>Cc: Vivi, Rodrigo <rodrigo.vivi at intel.com>; Chris Wilson <chris at chris-
>>wilson.co.uk>; Srivatsa, Anusha <anusha.srivatsa at intel.com>
>>Subject: [PATCH] drm/i915: Unify GT* and GT3 definitions
>>
>>This patch clean up a bit the platform definition block in a way to avoid
>>duplications and to let clear that GT3 for the current platform only have the extra
>>Media engine (BSD2).
>>
>>v2: Kabylake IS_KABYLAKE as Anusha noticed.
>>
>>v3: Avoid EXTRA_ENGINE_MASK and list rings out on GT3 to
>>    make it more clear.
>>
>>Cc: Chris Wilson <chris at chris-wilson.co.uk>
>>Cc: Anusha Srivatsa <anusha.srivatsa at intel.com>
>>Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
>
> Reviewed-by: Anusha Srivatsa <anusha.srivatsa at intel.com>
>
>> drivers/gpu/drm/i915/i915_pci.c | 57 +++++++++++++++++++----------------------
>> 1 file changed, 27 insertions(+), 30 deletions(-)
>>
>>diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
>>index cf43dc1..b283224 100644
>>--- a/drivers/gpu/drm/i915/i915_pci.c
>>+++ b/drivers/gpu/drm/i915/i915_pci.c
>>@@ -312,16 +312,17 @@
>>       .has_full_48bit_ppgtt = 1, \
>>       .has_64bit_reloc = 1
>>
>>+#define BDW_PLATFORM \
>>+      BDW_FEATURES, \
>>+      .gen = 8, \
>>+      .platform = INTEL_BROADWELL
>>+
>> static const struct intel_device_info intel_broadwell_info = {
>>-      BDW_FEATURES,
>>-      .gen = 8,
>>-      .platform = INTEL_BROADWELL,
>>+      BDW_PLATFORM,
>> };
>>
>> static const struct intel_device_info intel_broadwell_gt3_info = {
>>-      BDW_FEATURES,
>>-      .gen = 8,
>>-      .platform = INTEL_BROADWELL,
>>+      BDW_PLATFORM,
>>       .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING |
>>BSD2_RING,  };
>>
>>@@ -347,22 +348,20 @@
>>       CHV_COLORS,
>> };
>>
>>+#define SKL_PLATFORM \
>>+      BDW_FEATURES, \
>>+      .gen = 9, \
>>+      .platform = INTEL_SKYLAKE, \
>>+      .has_csr = 1, \
>>+      .has_guc = 1, \
>>+      .ddb_size = 896
>>+
>> static const struct intel_device_info intel_skylake_info = {
>>-      BDW_FEATURES,
>>-      .platform = INTEL_SKYLAKE,
>>-      .gen = 9,
>>-      .has_csr = 1,
>>-      .has_guc = 1,
>>-      .ddb_size = 896,
>>+      SKL_PLATFORM,
>> };
>>
>> static const struct intel_device_info intel_skylake_gt3_info = {
>>-      BDW_FEATURES,
>>-      .platform = INTEL_SKYLAKE,
>>-      .gen = 9,
>>-      .has_csr = 1,
>>-      .has_guc = 1,
>>-      .ddb_size = 896,
>>+      SKL_PLATFORM,
>>       .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING |
>>BSD2_RING,  };
>>
>>@@ -406,22 +405,20 @@
>>       .color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 }  };
>>
>>+#define KBL_PLATFORM \
>>+      BDW_FEATURES, \
>>+      .gen = 9, \
>>+      .platform = INTEL_KABYLAKE, \
>>+      .has_csr = 1, \
>>+      .has_guc = 1, \
>>+      .ddb_size = 896
>>+
>> static const struct intel_device_info intel_kabylake_info = {
>>-      BDW_FEATURES,
>>-      .platform = INTEL_KABYLAKE,
>>-      .gen = 9,
>>-      .has_csr = 1,
>>-      .has_guc = 1,
>>-      .ddb_size = 896,
>>+      KBL_PLATFORM,
>> };
>>
>> static const struct intel_device_info intel_kabylake_gt3_info = {
>>-      BDW_FEATURES,
>>-      .platform = INTEL_KABYLAKE,
>>-      .gen = 9,
>>-      .has_csr = 1,
>>-      .has_guc = 1,
>>-      .ddb_size = 896,
>>+      KBL_PLATFORM,
>>       .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING |
>>BSD2_RING,  };
>>
>>--
>>1.9.1
>
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-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br