[Intel-gfx] [PATCH 14/67] drm/i915/cnl: WaDisableEnhancedSBEVertexCaching

[Mika Kuoppala]

Rodrigo Vivi <rodrigo.vivi at intel.com> writes:

> WA forTDS handle reallocation getting dropped by SDE,
> which may result in PS attribute corruption.
>
> Disable enhanced SBE vertex caching in COMMON_SLICE_CHICKEN2 offset.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_engine_cs.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index 7a3c8ab..b5599fa 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -955,6 +955,10 @@ static int cnl_init_workarounds(struct intel_engine_cs *engine)
>  	WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2,
>  			  GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION);
>  
> +	/* WaDisableEnhancedSBEVertexCaching:cnl */
> +	WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2,
> +			  GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE);
> +

+ if (IS_CNL_REVID(dev_priv, 0, B0)

Let's trust the documentation in this case and hope we don't need to
regret.

With that changed,

Reviewed-by: Mika Kuoppala <mika.kuoppala at intel.com>


>  	/* WaInPlaceDecompressionHang:cnl */
>  	WA_SET_BIT(GEN9_GAMT_ECO_REG_RW_IA,
>  		   GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);
> -- 
> 1.9.1
>
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