[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/17] drm/i915/cnl: Implement .get_display_clock_speed() for CNL

[Patchwork]

== Series Details ==

Series: series starting with [01/17] drm/i915/cnl: Implement .get_display_clock_speed() for CNL
URL   : https://patchwork.freedesktop.org/series/25511/
State : success

== Summary ==

Series 25511v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/25511/revisions/1/mbox/

fi-bdw-5557u     total:278  pass:267  dwarn:0   dfail:0   fail:0   skip:11  time:443s
fi-bdw-gvtdvm    total:278  pass:256  dwarn:8   dfail:0   fail:0   skip:14  time:437s
fi-bsw-n3050     total:278  pass:242  dwarn:0   dfail:0   fail:0   skip:36  time:586s
fi-bxt-j4205     total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:19  time:512s
fi-byt-j1900     total:278  pass:254  dwarn:0   dfail:0   fail:0   skip:24  time:491s
fi-byt-n2820     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time:480s
fi-glk-2a        total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:19  time:595s
fi-hsw-4770      total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time:432s
fi-hsw-4770r     total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time:414s
fi-ilk-650       total:278  pass:228  dwarn:0   dfail:0   fail:0   skip:50  time:415s
fi-ivb-3520m     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:495s
fi-ivb-3770      total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:466s
fi-kbl-7500u     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:466s
fi-kbl-7560u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time:582s
fi-kbl-r         total:278  pass:259  dwarn:1   dfail:0   fail:0   skip:18  time:567s
fi-skl-6260u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time:470s
fi-skl-6700hq    total:278  pass:228  dwarn:1   dfail:0   fail:27  skip:22  time:398s
fi-skl-6700k     total:278  pass:256  dwarn:4   dfail:0   fail:0   skip:18  time:466s
fi-skl-6770hq    total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time:503s
fi-skl-gvtdvm    total:278  pass:265  dwarn:0   dfail:0   fail:0   skip:13  time:435s
fi-snb-2520m     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time:535s
fi-snb-2600      total:278  pass:249  dwarn:0   dfail:0   fail:0   skip:29  time:403s

5b363842b49a66879d4c67d652923fb04e44b271 drm-tip: 2017y-06m-08d-20h-34m-37s UTC integration manifest
047d03a drm/i915/cnl: LSPCON support is gen9+
4602800 drm/i915/cnl: Enable fifo underrun for Cannonlake.
94002bc drm/i915/cnl: Fix Cannonlake scaler mode programing.
6ec0801 drm/i915: Use HAS_CSR instead of gen number on DMC load.
45cd393 drm/i915/DMC/CNL: Load DMC on CNL
158f796 drm/i915/cnl: Enable loadgen_select bit for vswing sequence
e3ac452 drm/i915/cnl: Implement voltage swing sequence.
3934c28 drm/i915/cnl: Add DDI Buffer translation tables for Cannonlake.
b232247d drm/i915/cnl: Add registers related to voltage swing sequences.
8b1aeda drm/i915: Add MMIO helper for 6 ports with different offsets.
681fb13 drm/i915/cnl: Initialize PLLs
61a1a82 drm/i915: Configure DPLL's for Cannonlake
f670bf3 drm/i915/cnl: DDI - PLL mapping
ca823ce drm/i915/cnl: Allow dynamic cdclk changes on CNL
feab0e1 drm/i915/cnl: Implement CNL display init/unit sequence
be18d64 drm/i915/cnl: Implement .set_cdclk() for CNL
abf52fd drm/i915/cnl: Implement .get_display_clock_speed() for CNL

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4917/