[Intel-gfx] [PATCH 08/17] drm/i915: Add MMIO helper for 6 ports with different offsets.

[Vivi, Rodrigo]

On Thu, 2017-06-08 at 16:53 -0700, Manasi Navare wrote:
> On Thu, Jun 08, 2017 at 03:03:17PM -0700, Rodrigo Vivi wrote:
> > Also new registers can have different mmio offsets
> > per different lane per port.
> > 
> > v2: Use _PICK as PORT3 instead of creating a new
> >     macro with if per port.
> > v3: Use _PICK directly on MMIO_PORT6. While MMIO_PORT
> >     isn't flexible enough let's continue with MMIO_PORT6
> >     as we have MMIO_PORT3.
> > 
> > Cc: Manasi Navare <manasi.d.navare at intel.com>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_reg.h | 3 +++
> >  1 file changed, 3 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 9421915..52a15ce 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -62,6 +62,9 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
> >  #define _MMIO_PORT3(pipe, a, b, c) _MMIO(_PICK(pipe, a, b, c))
> >  #define _PLL(pll, a, b) ((a) + (pll)*((b)-(a)))
> >  #define _MMIO_PLL(pll, a, b) _MMIO(_PLL(pll, a, b))
> > +#define _MMIO_PORT6(port, a, b, c, d, e, f) _MMIO(_PICK(port, a, b, c, d, e, f))
> > +#define _MMIO_PORT6_LN(port, ln, a0, a1, b, c, d, e, f)			\
> > +	_MMIO(_PICK(port, a0, b, c, d, e, f) + (ln * (a1 - a0)))
> 
> Don't you want to remove the #define for _PORT6, now that MMIO_PORT6 directly
> uses _PICK

_PORT6 was removed... are you looking to the latest version?

I hope to remove _MMIO_PORT6 with the generic/flexible _MMIO_PORT...


> Manasi
> 
> 
> >  #define _PHY3(phy, ...) _PICK(phy, __VA_ARGS__)
> >  #define _MMIO_PHY3(phy, a, b, c) _MMIO(_PHY3(phy, a, b, c))
> >  
> > -- 
> > 1.9.1
> >