[Intel-gfx] [PATCH 1/7] drm/i915: reorder the register picking macros

[Paulo Zanoni]

We currently have pipe, plane, trans, port, pll and phy versions of
these macros. Reorder their definitions so all macros of each type are
in their own group, separated by blank lines.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 88e4707..a1d3cca 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -52,19 +52,24 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 
 #define _PIPE(pipe, a, b) ((a) + (pipe)*((b)-(a)))
 #define _MMIO_PIPE(pipe, a, b) _MMIO(_PIPE(pipe, a, b))
+#define _MMIO_PIPE3(pipe, a, b, c) _MMIO(_PICK(pipe, a, b, c))
+
 #define _PLANE(plane, a, b) _PIPE(plane, a, b)
 #define _MMIO_PLANE(plane, a, b) _MMIO_PIPE(plane, a, b)
+
 #define _TRANS(tran, a, b) ((a) + (tran)*((b)-(a)))
 #define _MMIO_TRANS(tran, a, b) _MMIO(_TRANS(tran, a, b))
+
 #define _PORT(port, a, b) ((a) + (port)*((b)-(a)))
 #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b))
-#define _MMIO_PIPE3(pipe, a, b, c) _MMIO(_PICK(pipe, a, b, c))
 #define _MMIO_PORT3(pipe, a, b, c) _MMIO(_PICK(pipe, a, b, c))
-#define _PLL(pll, a, b) ((a) + (pll)*((b)-(a)))
-#define _MMIO_PLL(pll, a, b) _MMIO(_PLL(pll, a, b))
 #define _MMIO_PORT6(port, a, b, c, d, e, f) _MMIO(_PICK(port, a, b, c, d, e, f))
 #define _MMIO_PORT6_LN(port, ln, a0, a1, b, c, d, e, f)			\
 	_MMIO(_PICK(port, a0, b, c, d, e, f) + (ln * (a1 - a0)))
+
+#define _PLL(pll, a, b) ((a) + (pll)*((b)-(a)))
+#define _MMIO_PLL(pll, a, b) _MMIO(_PLL(pll, a, b))
+
 #define _PHY3(phy, ...) _PICK(phy, __VA_ARGS__)
 #define _MMIO_PHY3(phy, a, b, c) _MMIO(_PHY3(phy, a, b, c))
 
-- 
2.9.4