[Intel-gfx] [PATCH 5/5] drm/i915: Always use 9 bits of the LPC bridge device ID for PCH detection

Ville Syrjälä ville.syrjala at linux.intel.com
Tue Jun 20 18:50:10 UTC 2017


On Tue, Jun 20, 2017 at 06:36:11PM +0000, Pandiyan, Dhinakaran wrote:
> 
> 
> 
> On Tue, 2017-06-20 at 16:03 +0300, ville.syrjala at linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > 
> > Make the code less confusiong by always using the top 9 bits of the
> > LPC bridge device ID to detect the PCH type. We need to add a bit of
> > new code for WPT, and we need to adjust the KBP ID as well. All the
> > other pre-CNP IDs are fine as is.
> 
> I had a similar patch written but dropped it because I could not
> ascertain the nature of support for WPT and the full Dev ID's for P2X
> and P3X. Still cannot verify if the changes for P2X and P3X are correct,
> but thanks for doing this. 
> 
> Curious if LPC is the same as ISA, which iirc the code refers to.

LPC is the stripped down to the bone remnants of ISA.

> 
> 
> > 
> > The CNP ID I guessed based on the KBP + CNP LP IDs. But someone else
> > should really verify this.
> > 
> 
> The previous version was correct. 

Dang. Apparently my crystal ball wasn't quite good enough.

> 
> Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com> with
> the CNP change reverted. 
> 
> > The virtualization cases I think are fine. These P2X and P3X IDs
> > actually just look like the old PIIX4 and PIIX3 IDs to me. Not sure
> > why they're not called PIIX3/4 though. The qemu one has a comment
> > saying the full ID is 0x2918 which is fine with 9 bits.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_drv.c | 35 ++++++++++++++++++++---------------
> >  drivers/gpu/drm/i915/i915_drv.h | 15 +++++++++------
> >  2 files changed, 29 insertions(+), 21 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> > index 1681be8d21f6..bfb39047f5e1 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.c
> > +++ b/drivers/gpu/drm/i915/i915_drv.c
> > @@ -173,29 +173,25 @@ static void intel_detect_pch(struct drm_i915_private *dev_priv)
> >  	while ((pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, pch))) {
> >  		if (pch->vendor == PCI_VENDOR_ID_INTEL) {
> >  			unsigned short id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
> > -			unsigned short id_ext = pch->device &
> > -				INTEL_PCH_DEVICE_ID_MASK_EXT;
> > +
> > +			dev_priv->pch_id = id;
> >  
> >  			if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) {
> > -				dev_priv->pch_id = id;
> >  				dev_priv->pch_type = PCH_IBX;
> >  				DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
> >  				WARN_ON(!IS_GEN5(dev_priv));
> >  			} else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
> > -				dev_priv->pch_id = id;
> >  				dev_priv->pch_type = PCH_CPT;
> >  				DRM_DEBUG_KMS("Found CougarPoint PCH\n");
> >  				WARN_ON(!IS_GEN6(dev_priv) &&
> >  					!IS_IVYBRIDGE(dev_priv));
> >  			} else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) {
> >  				/* PantherPoint is CPT compatible */
> > -				dev_priv->pch_id = id;
> >  				dev_priv->pch_type = PCH_CPT;
> >  				DRM_DEBUG_KMS("Found PantherPoint PCH\n");
> >  				WARN_ON(!IS_GEN6(dev_priv) &&
> >  					!IS_IVYBRIDGE(dev_priv));
> >  			} else if (id == INTEL_PCH_LPT_DEVICE_ID_TYPE) {
> > -				dev_priv->pch_id = id;
> >  				dev_priv->pch_type = PCH_LPT;
> >  				DRM_DEBUG_KMS("Found LynxPoint PCH\n");
> >  				WARN_ON(!IS_HASWELL(dev_priv) &&
> > @@ -203,39 +199,49 @@ static void intel_detect_pch(struct drm_i915_private *dev_priv)
> >  				WARN_ON(IS_HSW_ULT(dev_priv) ||
> >  					IS_BDW_ULT(dev_priv));
> >  			} else if (id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) {
> > -				dev_priv->pch_id = id;
> >  				dev_priv->pch_type = PCH_LPT;
> >  				DRM_DEBUG_KMS("Found LynxPoint LP PCH\n");
> >  				WARN_ON(!IS_HASWELL(dev_priv) &&
> >  					!IS_BROADWELL(dev_priv));
> >  				WARN_ON(!IS_HSW_ULT(dev_priv) &&
> >  					!IS_BDW_ULT(dev_priv));
> > +			} else if (id == INTEL_PCH_WPT_DEVICE_ID_TYPE) {
> > +				/* WildcatPoint is LPT compatible */
> > +				dev_priv->pch_type = PCH_LPT;
> > +				DRM_DEBUG_KMS("Found WildcatPoint PCH\n");
> > +				WARN_ON(!IS_HASWELL(dev_priv) &&
> > +					!IS_BROADWELL(dev_priv));
> > +				WARN_ON(IS_HSW_ULT(dev_priv) ||
> > +					IS_BDW_ULT(dev_priv));
> > +			} else if (id == INTEL_PCH_WPT_LP_DEVICE_ID_TYPE) {
> > +				/* WildcatPoint is LPT compatible */
> > +				dev_priv->pch_type = PCH_LPT;
> > +				DRM_DEBUG_KMS("Found WildcatPoint LP PCH\n");
> > +				WARN_ON(!IS_HASWELL(dev_priv) &&
> > +					!IS_BROADWELL(dev_priv));
> > +				WARN_ON(!IS_HSW_ULT(dev_priv) &&
> > +					!IS_BDW_ULT(dev_priv));
> >  			} else if (id == INTEL_PCH_SPT_DEVICE_ID_TYPE) {
> > -				dev_priv->pch_id = id;
> >  				dev_priv->pch_type = PCH_SPT;
> >  				DRM_DEBUG_KMS("Found SunrisePoint PCH\n");
> >  				WARN_ON(!IS_SKYLAKE(dev_priv) &&
> >  					!IS_KABYLAKE(dev_priv));
> > -			} else if (id_ext == INTEL_PCH_SPT_LP_DEVICE_ID_TYPE) {
> > -				dev_priv->pch_id = id_ext;
> > +			} else if (id == INTEL_PCH_SPT_LP_DEVICE_ID_TYPE) {
> >  				dev_priv->pch_type = PCH_SPT;
> >  				DRM_DEBUG_KMS("Found SunrisePoint LP PCH\n");
> >  				WARN_ON(!IS_SKYLAKE(dev_priv) &&
> >  					!IS_KABYLAKE(dev_priv));
> >  			} else if (id == INTEL_PCH_KBP_DEVICE_ID_TYPE) {
> > -				dev_priv->pch_id = id;
> >  				dev_priv->pch_type = PCH_KBP;
> >  				DRM_DEBUG_KMS("Found KabyPoint PCH\n");
> >  				WARN_ON(!IS_SKYLAKE(dev_priv) &&
> >  					!IS_KABYLAKE(dev_priv));
> >  			} else if (id == INTEL_PCH_CNP_DEVICE_ID_TYPE) {
> > -				dev_priv->pch_id = id;
> >  				dev_priv->pch_type = PCH_CNP;
> >  				DRM_DEBUG_KMS("Found CannonPoint PCH\n");
> >  				WARN_ON(!IS_CANNONLAKE(dev_priv) &&
> >  					!IS_COFFEELAKE(dev_priv));
> > -			} else if (id_ext == INTEL_PCH_CNP_LP_DEVICE_ID_TYPE) {
> > -				dev_priv->pch_id = id_ext;
> > +			} else if (id == INTEL_PCH_CNP_LP_DEVICE_ID_TYPE) {
> >  				dev_priv->pch_type = PCH_CNP;
> >  				DRM_DEBUG_KMS("Found CannonPoint LP PCH\n");
> >  				WARN_ON(!IS_CANNONLAKE(dev_priv) &&
> > @@ -247,7 +253,6 @@ static void intel_detect_pch(struct drm_i915_private *dev_priv)
> >  					    PCI_SUBVENDOR_ID_REDHAT_QUMRANET &&
> >  				    pch->subsystem_device ==
> >  					    PCI_SUBDEVICE_ID_QEMU)) {
> > -				dev_priv->pch_id = id;
> >  				dev_priv->pch_type =
> >  					intel_virt_detect_pch(dev_priv);
> >  			} else
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 1b97eb098ffe..4a884cf9b47d 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -2996,17 +2996,18 @@ intel_info(const struct drm_i915_private *dev_priv)
> >  
> >  #define HAS_POOLED_EU(dev_priv)	((dev_priv)->info.has_pooled_eu)
> >  
> > -#define INTEL_PCH_DEVICE_ID_MASK		0xff00
> > -#define INTEL_PCH_DEVICE_ID_MASK_EXT		0xff80
> > +#define INTEL_PCH_DEVICE_ID_MASK		0xff80
> >  #define INTEL_PCH_IBX_DEVICE_ID_TYPE		0x3b00
> >  #define INTEL_PCH_CPT_DEVICE_ID_TYPE		0x1c00
> >  #define INTEL_PCH_PPT_DEVICE_ID_TYPE		0x1e00
> >  #define INTEL_PCH_LPT_DEVICE_ID_TYPE		0x8c00
> >  #define INTEL_PCH_LPT_LP_DEVICE_ID_TYPE		0x9c00
> > +#define INTEL_PCH_WPT_DEVICE_ID_TYPE		0x8c80
> > +#define INTEL_PCH_WPT_LP_DEVICE_ID_TYPE		0x9c80
> >  #define INTEL_PCH_SPT_DEVICE_ID_TYPE		0xA100
> >  #define INTEL_PCH_SPT_LP_DEVICE_ID_TYPE		0x9D00
> > -#define INTEL_PCH_KBP_DEVICE_ID_TYPE		0xA200
> > -#define INTEL_PCH_CNP_DEVICE_ID_TYPE		0xA300
> > +#define INTEL_PCH_KBP_DEVICE_ID_TYPE		0xA280
> > +#define INTEL_PCH_CNP_DEVICE_ID_TYPE		0xA380
> 
> 0xA300 
> 
> 
> >  #define INTEL_PCH_CNP_LP_DEVICE_ID_TYPE		0x9D80
> >  #define INTEL_PCH_P2X_DEVICE_ID_TYPE		0x7100
> >  #define INTEL_PCH_P3X_DEVICE_ID_TYPE		0x7000
> > @@ -3020,9 +3021,11 @@ intel_info(const struct drm_i915_private *dev_priv)
> >  #define HAS_PCH_SPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_SPT)
> >  #define HAS_PCH_LPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_LPT)
> >  #define HAS_PCH_LPT_LP(dev_priv) \
> > -	((dev_priv)->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE)
> > +	((dev_priv)->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE || \
> > +	 (dev_priv)->pch_id == INTEL_PCH_WPT_LP_DEVICE_ID_TYPE)
> >  #define HAS_PCH_LPT_H(dev_priv) \
> > -	((dev_priv)->pch_id == INTEL_PCH_LPT_DEVICE_ID_TYPE)
> > +	((dev_priv)->pch_id == INTEL_PCH_LPT_DEVICE_ID_TYPE || \
> > +	 (dev_priv)->pch_id == INTEL_PCH_WPT_DEVICE_ID_TYPE)
> >  #define HAS_PCH_CPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_CPT)
> >  #define HAS_PCH_IBX(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_IBX)
> >  #define HAS_PCH_NOP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_NOP)

-- 
Ville Syrjälä
Intel OTC


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