[Intel-gfx] [PATCH 12/19] drm/i915: support 64K pages for the 48b PPGTT

Chris Wilson chris at chris-wilson.co.uk
Wed Jun 21 21:55:15 UTC 2017


Quoting Matthew Auld (2017-06-21 21:33:38)
> Signed-off-by: Matthew Auld <matthew.auld at intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 26 ++++++++++++++++++++++++++
>  drivers/gpu/drm/i915/i915_gem_gtt.h |  1 +
>  2 files changed, 27 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 03c35097ef39..9b89ec10f333 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -937,6 +937,7 @@ static void gen8_ppgtt_insert_huge_entries(struct i915_vma *vma,
>                 struct i915_page_table *pt = pd->page_table[idx.pde];
>                 dma_addr_t rem = iter->max - iter->dma;
>                 unsigned int page_size;
> +               bool maybe_64K = false;
>                 gen8_pte_t encode = pte_encode;
>                 gen8_pte_t *vaddr;
>                 u16 index, max;
> @@ -962,9 +963,17 @@ static void gen8_ppgtt_insert_huge_entries(struct i915_vma *vma,
>                         index = idx.pte;
>                         max = GEN8_PTES;
>                         page_size = I915_GTT_PAGE_SIZE;
> +
> +                       if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K && !idx.pte)
> +                               maybe_64K = true;
>                 }
>  
>                 do {
> +                       if (maybe_64K && (index % 16 == 0) &&
> +                           (!IS_ALIGNED(iter->dma, I915_GTT_PAGE_SIZE_64K) ||
> +                            rem < I915_GTT_PAGE_SIZE_64K))
> +                               maybe_64K = false;
> +
>                         vaddr[index++] = encode | iter->dma;
>  
>                         start += page_size;
> @@ -986,6 +995,23 @@ static void gen8_ppgtt_insert_huge_entries(struct i915_vma *vma,
>  
>                 kunmap_atomic(vaddr);
>  
> +
> +               /* Is it safe to mark the 2M block as 64K? -- Either we have
> +                * filled whole page-table with 64K entries, or filled part of
> +                * it and have reached the end of the sg table and we have
> +                * enough padding.
> +                */
> +               if (maybe_64K) {
> +                       if (index == max ||
> +                           (!iter->sg && IS_ALIGNED(vma->node.start +
> +                                                    vma->node.size,
> +                                                    I915_GTT_PAGE_SIZE_2M))) {
> +                               vaddr = kmap_atomic_px(pd);
> +                               vaddr[idx.pde] |= GEN8_PDE_IPS_64K;
> +                               kunmap_atomic(vaddr);
> +                       }

Hmm. I think you know this at the start. It's a bit hard to see from
this diff why not.
-Chris


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